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Imagination Launches Design Optimization Kit to Reduce Semiconductor Development Time and Increase Profitability

Google 우선 소스Published2013.07.16 11:45

July 3, 2013 – Imagination Technologies (hereinafter Imagination, www.imgtec.com ), a leading company in multimedia, communications semiconductors, and cloud technology, announced on the 2nd that it has launched new Design Optimization Kits (hereinafter DOK) that enable flexible management of Power, Performance, and Area (PPA) for GPU, CPU, and IP core product families. Imagination’s DOK consists of optimized reference design flows, documentation coordinated with partners, characterization data, and documentation.

Imagination DOK, scheduled for release later this year, has enabled customers to significantly accelerate product launch speeds using their PowerVR Series 6 'Rogue' GPUs and drastically reduce power consumption and area requirements through core and physical IP packages jointly developed by Imagination and Synopsys. The DOK and customer-leveraged PowerVR Series 6 GPUs, including Synopsys' new high-performance core DesignWare® HPC Design Kit, reduce dynamic power* (based on static toggle rates) by up to 25%, decrease area by 10%, and improve turnaround time by approximately 30%** through Tune Design Flow (based on TSMC 28HPM process PowerVR G6100 IP core).

PowerVR GPU cores not only possessed best-in-class performance per square millimeter but were also highly efficient with low power consumption compared to competing solutions. Customers now have optimal development conditions to aim for an ideal balance of performance, power, and specific application areas through Imagination's new DOK, which has already proven performance.

Imagination and Synopsys embarked on technology development based on HPC design kits, focusing on PowerVR GPUs, MIPS CPUs, and the like during the early stages of development. Currently, Imagination is expanding its IP portfolio around key product families including video and vision processors (VPUs) and radio communication processors (RPUs).

Recent trends in semiconductor design technology show that the SoC domain is increasingly gaining market dominance, while GPUs continue to grow in relation to core SoCs. This trend is expected to continue driven by advancements in ultra-HD/4K resolution and GPU computing technology. Furthermore, SoC complexity is projected to increase, expanding into thermally constrained mobile application sectors while maintaining power budgets. Under these circumstances, enterprises require solutions capable of flexibly managing power, performance, and domain optimization during the execution of GPUs, CPUs, and other processors.

Tony King-Smith, Vice President of Marketing at Imagination, expressed confidence, stating, “To succeed in an increasingly competitive market, customers need to establish standards that meet their requirements and create optimized PPA designs using the libraries and design flows they desire,” and added, “With Imagination’s DOK, customers can now not only achieve results but also significantly reduce the time required for design.”

In addition, “We are pleased to be working closely with Synopsys to be the first to launch DOK for PowerVR Series 6 GPUs.” “I believe the strategic collaboration with Synopsys is a good example of how it enables customers to achieve optimal performance by utilizing IP and their preferred flows, memory, and standard cell libraries,” he said.

Meanwhile, John Koeter, Vice President of IP and System Marketing at Synopsys, stated, “Synopsys’ new DesignWare HPC Design Kit enables optimization across various processor cores,” adding, “We have achieved remarkable results in the CPU and GPU fields through close collaboration with Imagination over the past several years. The new DOK for Imagination’s PowerVR Series 6 GPU will enable the company to unleash individual capabilities and provide mutually optimized solutions for customers. We look forward to continuing our collaboration on the DOK for MIPS CPU products as well as on Imagination’s new projects in the future.”

How to purchase
Imagination's new 'Design Optimization Kit' for PowerVR Series 6 IP cores is scheduled for release within the third quarter of this year and includes optimal reference flows, floor plans, and Synopsys' DesignWare HPC Design Kit. Customers can receive professional services from Synopsys regarding PowerVR Series 6 technology plugins for the Lynx Design System and design optimization.

About the PowerVR Series 6 'Rogue' GPU
The PowerVR Series 6 architecture was designed to meet the demands of the high-performance market with embedded graphics cards, ranging from mobile devices to smartphones, tablets, PCs, consoles, automobiles, and TVs, based on the quantifiable number of computing clusters. PowerVR Series 6 cores utilize these programmable computing elements to provide leading GPU computing performance while minimizing power consumption and bandwidth requirements.
PowerVR Series 6 GPUs provide full support for GPU computing APIs that are becoming increasingly popular, including OpenCL 1.x, RenderScrip Compute/FilterScrip, and others, offering an optimal balance between performance and power consumption for mobile and embedded devices. The Series 6 family is designed to support the latest graphics APIs, including OpenGL ES 3/2/1.1, OpenGL 3.x/4.x, and full WHQL-compliant DirectX 9.3/10, and for some families, this capability has been extended to DirectX 11.1.
Imagination's PowerVR graphics technology is effectively the standard for mobile and embedded graphics. PowerVR GPU technology is led by the world's largest engineering team dedicated to graphics processor development. This development is supported by Imagination's PowerVR Insider ecosystem, which backs an active community of over 35,000 people who have already developed hundreds of thousands of apps optimized for PowerVR Power devices. PowerVR Series 6 is manufactured in silicon and has already been sold to numerous partners.

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