Techday
This page was machine-translated and may differ from the original. View original

Silicon Labs Announces Industry-Leading Low-Jitter Clock Solution Supporting Synchronous Ethernet

Google 우선 소스Published2013.08.26 17:10

August 22, 2013 - Silicon Labs (NASDAQ: SLAB), a world-leading specialist in high-performance analog-intensive mixed-signal ICs, announced today a timing solution with industry-leading low jitter, low power, and high frequency flexibility for high-speed networking equipment based on the Synchronous Ethernet (SyncE) standard. The new Si5328 precision clock multiplier/jitter attenuator addresses the requirement for ultra-low jitter physical layer reference clock in carrier Ethernet switches and routers. With synthesis capability across all frequencies combined with industry-leading jitter performance (as low as 263 picoseconds RMS), the Si5328 is 80% smaller in size and 80% more power efficient than competing synchronous Ethernet clocks. This product is the best-in-class synchronous Ethernet timing solution suitable for edge routers, multiservice switches, wireless backhaul systems, DSLAMs, and OLT (Optical Line Termination) equipment for GPON/GEPON.

The telecommunications infrastructure market is rapidly transitioning from legacy SONET/SDH networks to high-speed, cost-effective Ethernet networks. Synchronous Ethernet is the key technology enabling this network transition, used to distribute accurate timing in Gigabit Ethernet (GbE), 10GbE, 40GbE, and 100GbE carrier Ethernet switches and routers. All carrier Ethernet switches and routers require high-performance synchronous Ethernet clocks to provide wander filtering, timing distribution, and low-jitter Ethernet PHY reference clocks. Silicon Labs addresses application requirements through synchronous Ethernet timing solutions with industry-leading low jitter and the highest frequency flexibility optimized for Ethernet PHYs ranging from GbE to 100GbE.

The Si5328 complies with all ITU-T G.8262 SyncE clock requirements including EEC options 1 and 2. When used with a Stratum 3 temperature-compensated crystal oscillator (TCXO), the Si5328 meets all jitter, wander, and holdover requirements specified by the SyncE standard. Through the integration of a loop filter with selectable loop bandwidth of 0.1 Hz and 1 to 10 Hz, the Si5328 can be used in any networking system design that must comply with SyncE specifications. This integration eliminates the need for expensive discrete timing card phase-locked loop (PLL) circuits required in some systems, allowing manufacturers to confidently supply their networking products to worldwide end customers.

Leveraging Silicon Labs' proprietary DSPLL® technology, the Si5328 SyncE clock can generate any frequency in the range of 8 kHz to 808 MHz from any frequency input in the range of 8 kHz to 710 MHz. This unique flexible frequency generation enables networking system designers to synchronize and generate all existing telecommunications system or SyncE frequencies, simplifying system designs from GbE to 100GbE. The Si5328 is reconfigurable through I2C or SPI interfaces without additional BOM changes.

The Si5328 clock greatly simplifies printed circuit board (PCB) design through the highest level of single-chip integration. The product's DSPLL architecture eliminates the need for external crystal and loop filter components, reducing PCB space while maximizing immunity to board noise. Selectable output signal formats (LVPECL, LVDS, CML, CMOS) facilitate interfacing with the most commonly used Ethernet transceivers and eliminate the need for costly level shifters and other filtering components. The Si5328 operates from a single 2.5V or 3.3V supply, unlike competing SyncE timing solutions, eliminating the need for multiple power supplies and discrete filtering.

Mike Petrowski, Vice President of Silicon Labs' Timing Products Division, stated, "As telecommunications infrastructure rapidly transitions from legacy methods to SyncE, manufacturers need SyncE-compliant timing solutions with perfectly low jitter performance as well as low design complexity and power consumption. Silicon Labs' new Si5328 clock multiplier is the most advanced SyncE timing solution, providing designers with excellent jitter performance, BOM cost, footprint, and energy efficiency."

Pricing and Availability
Silicon Labs' SyncE Si5328 clock is currently in volume production in a compact 6 mm x 6 mm QFN package in two speed grades. The Si5328C-C-GM supports output clocks up to 346 MHz and is priced at $7.50 based on 10,000 unit quantities. The Si5328B-C-GM clock supports clock output up to 808 MHz and is priced at $9.38 based on 10,000 unit quantities. Silicon Labs provides an easy-to-use evaluation platform for $250 (USD/manufacturer's suggested retail price) to support rapid development of SyncE applications.

For inquiries regarding Silicon Labs' Si5328 SyncE clock multiplier/jitter attenuator, sample orders, and evaluation boards, visit www.silabs.com/timing.

To request a correction, reply or follow-up report on this article, see how to file a request. Previously published statements are collected in corrections & replies.
명세환 기자
명세환 Reporter