Xilinx Korea (Branch Manager Ahn Heung-sik) October 25, 2013 – Xilinx announced the UltraFast™ Design Methodology, a comprehensive design methodology for the Vivado® Design Suite, for design teams using the Vivado® Design Suite. Xilinx provides its Vivado Design Suite, user guides, video training courses, third-party tools, and IP to support easier utilization of its methodology.

Today's advanced algorithms used in telecommunications, medical, defense, and consumer applications require devices and design tools that expand the boundaries of complexity, performance, and power, as well as faster and more predictable design cycles. Design schedules related to design productivity, such as complex ASICs and SoCs, vary from several weeks to several months, similar to high-end design projects. To address these fundamental challenges, Xilinx developed the UltraFast methodology that can address all design elements including board planning, design creation, IP integration, implementation, programming, and hardware debug.

UltraFast Design Methodology for Vivado Design Suite

To enable broader and easier use of the UltraFast design methodology, the Vivado Design Suite 2013.3 release provides design rule checks (DRC) specifications and supports engineers throughout the design cycle. This release includes HDL and constraints templates that deliver optimal quality results. Information on UltraFast can also be found in a comprehensive user guide, and instructor training videos are available at www.xilinx.com/training.

Additionally, Xilinx is collaborating with Alliance Program ecosystem member companies to achieve faster and more predictable design cycles, and is currently working to integrate UltraFast methodology guidelines into ecosystem member tools and IP.

Ellis Smith, CEO of Blue Pearl Software, stated, "Blue Pearl Software Suite jointly with Xilinx's Vivado Design Suite provides customers with functional design analysis that allows them to verify UltraFast design methodology standards, properties, and design rules." He added, "Customers have already witnessed that the automated technology of this methodology significantly contributes to reducing the time spent writing accurate RTL code, lowering design risk, and improving result quality."

Availability

The UltraFast Design Methodology is available immediately. The first release of the UltraFast Design Methodology was developed for Xilinx FPGAs and All Programmable 3D ICs, and will include an expanded version for All Programmable SoCs in the future. For more information, visit www.xilinx.com/UltraFast.