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Applied Technologies, 2D EUV Process Miniaturization & New 3D GAA Technology

Google 우선 소스Published2022.04.28 14:02



Expansion of 'Stenza CVD' 2D EUV Logic Process Miniaturization
Extensive portfolio including two new IMS systems

Applied Materials has driven the expansion of 2D process miniaturization and the improvement of 3D GAA transistor engineering technology through new technology.

Applied Materials announced on the 28th innovative technologies that enable customers to continue 2D process miniaturization with EUV (extreme ultraviolet) and a technology portfolio for manufacturing next-generation 3D GAA (Gate All Around) transistors.

Applied's newly unveiled 'Stensar Advanced Patterning Film' for EUV is deposited using Applied's 'Precision CVD' system.

Unlike spin-on deposition, Applied's CVD films can control the EUV hardmask layer thickness and etching characteristics.

If semiconductor manufacturers use this film, they can achieve near-perfect EUV pattern transfer uniformity across the entire wafer.

Applied also introduced the 'Sym3 Y' etching system. With the Sym3 Y etching system, customers can perform thin film etching and deposition in the same chamber, allowing them to improve EUV patterns before etching the wafer.

The Sym3 chamber redeposits thin films in a unique manner that smoothly removes EUV resist material and then normalizes it by compensating for pattern variability caused by 'stochastic errors'.

Improved EUV patterns increase yield and enhance semiconductor power and performance. Based on this Applied Sym3 technology, the company is growing rapidly not only in the memory sector but also in the logic and foundry fields.

Currently, Applied is the number one supplier of conductor etching systems in the DRAM memory market.

Applied also developed the 'IMS' system for gate oxide stacks.

As the gate oxide thickness decreases, the driving current and transistor performance increase. On the other hand, leakage current also increases at the same time, resulting in power waste and heat generation.

Applied's newly released IMS system reduced oxide thickness to 1.5 angstroms (a unit of length used to measure the distance between atoms, 1 angstrom = 0.1 nanometer) compared to the previous method.

Through this, semiconductor companies can increase performance without increasing gate leakage, or reduce gate leakage by more than one-tenth while maintaining performance.

This IMS system integrated atomic layer deposition (ALD), heat treatment, plasma treatment, and measurement into a single high-vacuum system.

Applied also introduced an IMS system for GAA metal gate stack engineering.

If customers use this system, they can tune the threshold voltage by adjusting the gate thickness.

This enables the implementation of computing performance required in various fields, ranging from mobile devices to high-performance servers.

This IMS system performs the process under a high vacuum, minimizing contamination caused by exposure to the atmosphere.

"Applied Materials' strategy is to become a company that realizes PPACt for its customers," said Prabu Raja, Vice President and General Manager of the Semiconductor Products Group at Applied Materials. "We have unveiled seven innovative technologies that enable customers to continue 2D process miniaturization with EUV."

In addition, “GAA transistors are manufactured in a fundamentally different way from today’s FinFET transistors.” “Applied has developed two new Integrated Materials Solutions (IMS) for the realization of ideal GAA gate oxides and metal gates, and announced a wide range of products for GAA manufacturing, including epitaxy, atomic layer deposition, and selective thin film removal processes,” he said.
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