마이크로칩 8월
This page was machine-translated and may differ from the original. View original

Ionic PVD Systems Provide Solutions for 2D Process Miniaturization Wiring Problems

Google 우선 소스Published2022.06.08 15:46

Applied Materials Ionic PVD System
Applied Materials' integrated materials solutions support PVD, CVD, and surface treatment processes.

Semiconductor manufacturers are using advanced lithography technologies to scale chips down to the 3nm node and below. However, as line widths become thinner, electrical resistance increases dramatically. This results in reduced semiconductor chip performance and higher power consumption, negating the benefits of advanced transistors. To address this metal wiring resistance, a new solution has emerged.

Applied Materials announced on the 8th a new system that reengineers transistor metallization to significantly reduce electrical resistance, a key bottleneck in improving chip performance and power.

Chip metallization is deposited within trenches and vias etched into a dielectric material. Conventionally, this metallization is deposited using a metal stack, which includes: a barrier layer to prevent metal from mixing with the dielectric; a liner layer to promote bonding; a seed layer to facilitate metal injection; a metal such as tungsten or cobalt used for transistor electrodes; and copper for interconnect wires.

Unlike trenches and vias, barriers and liners are not as finely detailed, which reduces the space available for conductive metal. Also, as the metal wiring becomes finer, the electrical resistance increases.

Ionic PVD allows semiconductor manufacturers to replace high-resistivity liners and barrier layers made of titanium nitride with 100% pure, low-resistivity PVD tungsten thin films, which can then be combined with CVD tungsten to create 100% pure tungsten metal electrodes. This solution addresses resistance issues and enables 2D process scaling to the 3nm node or below.

The Ioniq PVD System is Applied's Integrated Materials Solution (IMS) that supports PVD (physical vapor deposition) and CVD (chemical vapor deposition) processes, as well as surface treatment processes, in a single high-vacuum system.

“Applied’s latest innovation in solving electrical resistance is a great example of how materials engineering is enabling continued 2D scaling,” said Prabhu Raja, vice president and general manager of the Semiconductor Products Group at Applied Materials. “Our innovative Ionic PVD system eliminates bottlenecks that slow transistor performance, enabling faster transistor operation and reduced power loss.”

“As semiconductors continue to become more complex, the ability to integrate multiple processes under high vacuum conditions is becoming increasingly important for innovation in metallization to help customers achieve their high-performance and low-power goals,” he said.

Meanwhile, more information about Applied Materials' solutions for solving metallization and interconnection challenges, including the Ionic PVD system, can be found in the masterclass, "New Methods for Semiconductor Metallization and Integration."
본 기사에 대한 정정·반론·추후보도 청구는 보도 청구 안내를, 그간 게재된 보도문은 정정·반론보도 모아보기를 참고해 주세요.
명세환 기자
명세환 기자