TI Korea (CEO Kent Chon, www.ti.com/ww/kr ) February 20, 2014 – TI (CEO Kent Chon) announced the launch of a 12-bit Analog-to-Digital Converter (ADC) that offers the industry's fastest speeds. The new RF Sampling ADC12J4000 operates at 4 GSPS, supports the JEDEC JESD204B serial interface standard for data converters of up to 8 Gbps or more, and consumes 50% less power than competing devices. In addition, it boasts the smallest size in its class at 10 mm x 10 mm. It is suitable for test and instrumentation, wireless, and defense applications, including spectrum analyzers, military equipment, digital pre-distortion feedback, and radar.

The ADC12J4000 integrates TI's giga-sample ADC IP (intellectual property) and a low-power digital processing block that provides digital filtering and down-conversion capabilities. System designers can directly sample a wide frequency spectrum block over RF and perform IQ (In-phase Quadrature-phase) conversion in the digital domain to reduce the possibility of signal distortion. Additionally, because the ADC12J4000 utilizes the JESD204B serial interface standard, it simplifies the layout while enabling data output across 1 to 8 lanes depending on decimation and link rate settings.

Key features of the ADC12J4000

• Broadband Sampling: Provides RF sampling performance with input bandwidths of 3 GHz or higher.
• Lowest Power Consumption: Consumes only 1.9W of power, 50% lower than competing devices.
• Unique Multi-Band Summing: Capable of handling some external signal conditioning typically required by FPGAs at total decimation of 4/8/10/16/20/32x (attenuating approximately 80dB at 80% bandwidth, 44dB at 85%, and 24dB at 90%), allowing system designers to filter high-frequency signals to lower data rates depending on their application.
• Flexible signal bandwidth: Characterized by high linearity with respect to signals, including a low-noise power ratio of 48.5 dB, a noise floor of -149 dBFS/Hz, and an intermediate frequency (IF) of 3 GHz, the combination of these factors enables system designs to sample at high frequencies.
• RF Sampling Analog Front-end: Available with the pin-compatible 4GSPS ultra-wideband RF sampling LM15851 AFE

By combining the ADC12J4000EVM, which includes the LMK04828 JESD204B clock jitter cleaner and the LMX2581 ultra-low noise wideband frequency synthesizer, with the TSW14J56EVM JESD204B solution platform, the performance of the ADC12J4000 can be comprehensively evaluated. By using the ADC12J4000EVM and TSW14J56EVM together, complex modulated signals can be captured and analyzed using TI's simple high-speed data converter pro software.

In addition, TI helps simplify development work using the ADC12J4000 by providing developers with various types of free tools and support, including IBIS models for board-level signal integrity verification and operational amplifier to ADC circuit topology calculators for anti-aliasing filter design and circuit topology.

By visiting the High-Speed Data Converter forum in the TI E2E™ community, you can search for relevant solutions and resolve issues through knowledge sharing and Q&A with fellow engineers and TI experts.