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IDT Launches VersaClock 5® with Best-in-Class Jitter Performance and 50% Lower Power Consumption Compared to Competing Products
IDT (http://ko.idt.com/, Branch Manager Lee Sang-yeop), an analog and digital company providing core mixed-signal semiconductor solutions, today unveiled the VersaClock 5 product family, a programmable clock generator that delivers the best jitter performance with 50% lower power consumption than competing products, continuing its position as a leading company in the timing industry. IDT's multi-output timing solutions add design ease to system components and are well-suited for price-sensitive, low-power consumer applications and low-jitter communication applications.
The 5P49V5901 is a system-embedded programmable clock generator featuring four pairs of general-purpose output pairs capable of generating independent frequencies up to 350MHz in various output formats. This product is a highly integrated device incorporating four differential or eight single-ended clock generators, and can store up to four configuration settings, thereby minimizing board space and bill of materials (BOM). Boasting RMS phase jitter of less than 0.7 picoseconds (ps) across the entire integration range from 12kHz to 20MHz, this product meets the stringent jitter requirements of PCIExpress® Gen 1/2/3, USB 3.0, and 1G/10G Ethernet. This high-performance clock generator operates at core power of 100mW or less, 50% lower than competing products, reducing system constraints related to thermal performance and operating power costs while maximizing battery life.
Christian Kermarrec, Vice President and General Manager of IDT's Timing and Synchronization Business Unit, stated, "VersaClock 5 is the industry's best complete clock tree solution suited for price-sensitive low-power consumer applications and low-jitter communication timing applications." He further explained, "Designing a clock tree is quite a challenging task, and this process often becomes more complex due to constraints from crystal oscillator frequency and sourcing requirements. VersaClock 5 resolves these issues through frequency and output configuration, crystal oscillator integration, and world-class support tools."
The four pairs of general-purpose output pairs generated by the 5P49V5901 can be configured as HCSL, LVPECL, LVDS, or dual LVCMOS outputs, each independently configurable. The fractional output divider generating each output pair is easily programmable via I2C, and since the 5P49V5901 is embedded in the system, system tuning and margin testing are possible. Reprogramming is unlimited within the system via I2C, and with support for four banks of one-time programmable (OTP) non-volatile memory, design changes are facilitated through project list consolidation or in the field or manufacturing stage. Additionally, upon customer request, programming at the product shipment stage according to desired settings is also available.
With high levels of integration, ease of use, and performance, system designers can use this product to address various applications including consumer, networking, computing, industrial, communication, broadcast video, and medical. The newly released product is fully supported by IDT's Timing Commander™ software platform, enabling engineers to configure and program their devices using an intuitive and time-saving graphical user interface (GUI). Previously developed configuration files are usable for most common applications.
The 5P49V5901 is a system-embedded programmable clock generator featuring four pairs of general-purpose output pairs capable of generating independent frequencies up to 350MHz in various output formats. This product is a highly integrated device incorporating four differential or eight single-ended clock generators, and can store up to four configuration settings, thereby minimizing board space and bill of materials (BOM). Boasting RMS phase jitter of less than 0.7 picoseconds (ps) across the entire integration range from 12kHz to 20MHz, this product meets the stringent jitter requirements of PCIExpress® Gen 1/2/3, USB 3.0, and 1G/10G Ethernet. This high-performance clock generator operates at core power of 100mW or less, 50% lower than competing products, reducing system constraints related to thermal performance and operating power costs while maximizing battery life.
Christian Kermarrec, Vice President and General Manager of IDT's Timing and Synchronization Business Unit, stated, "VersaClock 5 is the industry's best complete clock tree solution suited for price-sensitive low-power consumer applications and low-jitter communication timing applications." He further explained, "Designing a clock tree is quite a challenging task, and this process often becomes more complex due to constraints from crystal oscillator frequency and sourcing requirements. VersaClock 5 resolves these issues through frequency and output configuration, crystal oscillator integration, and world-class support tools."
The four pairs of general-purpose output pairs generated by the 5P49V5901 can be configured as HCSL, LVPECL, LVDS, or dual LVCMOS outputs, each independently configurable. The fractional output divider generating each output pair is easily programmable via I2C, and since the 5P49V5901 is embedded in the system, system tuning and margin testing are possible. Reprogramming is unlimited within the system via I2C, and with support for four banks of one-time programmable (OTP) non-volatile memory, design changes are facilitated through project list consolidation or in the field or manufacturing stage. Additionally, upon customer request, programming at the product shipment stage according to desired settings is also available.
With high levels of integration, ease of use, and performance, system designers can use this product to address various applications including consumer, networking, computing, industrial, communication, broadcast video, and medical. The newly released product is fully supported by IDT's Timing Commander™ software platform, enabling engineers to configure and program their devices using an intuitive and time-saving graphical user interface (GUI). Previously developed configuration files are usable for most common applications.
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