San Jose, California – May 8, 2014 – Altera Corporation (Nasdaq: ALTR) announced today that Stratix® 10 FPGA and SoC customers have successfully achieved an estimated 2x core performance gain compared to previous-generation high-performance programmable devices in their designs. Altera worked closely with early access customers representing diverse industries and performed benchmarking on their next-generation designs using the Stratix 10 FPGA performance evaluation tool. Customers experienced breakthrough performance increases in FPGA core performance through the combination of Intel's 14nm TriGate process technology and the groundbreaking Stratix 10 HyperFlex architecture.

The HyperFlex architecture, the next-generation core fabric architecture for Altera's Stratix 10 devices, represents the most significant advancement in structural innovation in the FPGA industry over the past decade and enables the implementation of applications that cannot be realized with existing FPGA architectures. Stratix 10 FPGA and SoC with HyperFlex architecture can meet the demanding requirements of cutting-edge, performance-critical applications in networking, communications, broadcast, defense, computing, and storage markets.

Early access customers are directly experiencing the tremendous performance gains that Stratix 10 devices provide. Through the Stratix 10 FPGA early access program, Altera collaborated with several customers to execute their existing designs through the performance evaluation tool created for Stratix 10 FPGA. Customer designs employ diverse hardware design methodologies targeting a wide range of applications, including ASIC replacement designs, conventional high-performance FPGA communications designs, and high-throughput data center and computing designs. In all cases, customers experienced a minimum 2x increase in design performance using Stratix 10 FPGA.

Bernd Liebetrau, Chief of Center for Digital Integration at Rohde & Schwarz, stated, "When I first participated in the Stratix 10 FPGA early access program, it was difficult to imagine the 2x performance improvement that Altera claimed. However, once we began working with Altera and received extensive guidance from Altera's technical team, within just a few days we were able to execute one of our existing designs through Altera's design tools and experience more than double the performance we had achieved previously. This level of performance opens up possibilities for new applications that were previously not possible with FPGAs."

In addition to benchmarking customer designs, Altera optimized some soft IP for the Stratix 10 HyperFlex architecture to deliver similar 2x performance gains. Altera's Optical Transport Network (OTN) IP portfolio operated at 350MHz on previous-generation high-performance FPGAs, but achieves over 700MHz performance when using Stratix 10 devices. Altera's 400GbE IP, which currently operates with a 1024-bit wide data path on Stratix V FPGA, operates at 2x performance with a 512-bit wide data path when applying the HyperFlex architecture, achieving the same high throughput while significantly reducing area utilization within the programmable core fabric.

Patrick Dorsey, Vice President of Product Marketing at Altera, stated, "It was a bold claim to assert that we could achieve a breakthrough 2x logic performance through architectural innovation and process technology leadership. By working closely with customers, Altera was able to actually validate what can be achieved with our next-generation Stratix 10 FPGA and SoC platform, and the results were remarkable."

Stratix 10 FPGA and SoC utilizing Intel's 14nm TriGate process and HyperFlex architecture are designed to implement cutting-edge, highest-performance applications in the communications, defense, broadcast, computing, and storage markets while significantly reducing system power consumption. Stratix 10 FPGA and SoC deliver 2x core performance of previous-generation high-performance devices. For high-performance systems with strict power budgets, Stratix 10 devices enable power consumption reduction of up to 70% compared to Stratix V FPGA.

Additionally, Stratix 10 FPGA and SoC offer industry-leading system integration. The devices feature highest-density single-chip implementation with over 4M LE (logic elements), over 10TeraFLOP single-precision enhanced floating-point DSP performance, 28Gbps backplane-supported transceivers and 56Gbps transceiver paths, over 4x serial transceiver bandwidth compared to previous-generation FPGAs, third-generation high-performance quad-core 64-bit ARM Cortex-A53 processor system, and multi-die solutions capable of integrating DRAM, SRAM, ASIC, processor, and analog components in a single package.