Infineon Technologies (Korea CEO Seung-soo Lee) has launched a new product for faster and more energy-efficient electric vehicle charging than existing products.

Infineon announced on the 19th that it is introducing the QDPAK package to its 650V CoolMOS™ CFD7A portfolio.

The QDPAK package family is designed to provide enhanced electrical performance at the same thermal performance as TO247 THD devices, enabling efficient energy utilization in onboard chargers and DC-DC converters.

An efficient and powerful electric vehicle charging system helps reduce charging time and vehicle weight, increases design flexibility, and lowers the total cost of ownership of the vehicle.

The new product complements the existing CoolMOS CFD7A series and is available in top and bottom cooling packages. By utilizing QDPAK TSC (Top Surface Cooling) during design, higher power density can be achieved and PCB space can be maximized.

The 650V CoolMOS CFD7A has several important features for stable operation in high-voltage applications.

Reduced parasitic source inductance minimizes electromagnetic interference (EMI) of the device, ensuring clean signals and consistent performance.

The Kelvin source pin ensures accurate measurements even under demanding conditions by increasing the precision of current sensing.

In addition, it is a powerful yet versatile device for various high-voltage applications with creepage distance suitable for high-voltage applications, high current capacity, and high power dissipation (Ptot) of up to 694W at 25°C.

By using the 650V CoolMOS CFD7A with QDPAK TSC, you can maximize PCB space utilization, double power density, and improve thermal management through substrate thermal decoupling.

This simplifies assembly, eliminates board stacking, and reduces the need for connectors, thereby lowering system costs. By lowering the thermal resistance of power switches by up to 35 percent, it provides high power dissipation that surpasses standard cooling solutions.

Therefore, it overcomes the thermal limitations of bottom-side cooling SMD designs using FR4 PCBs and significantly improves system performance.

Optimized power loop design enhances reliability by placing the driver near the power switch to reduce stray inductance and chip temperature. These characteristics contribute to the design of economical, robust, and efficient systems that meet modern power requirements.