Xilinx Korea (Branch Manager Ahn Heung-sik) June 24, 2014 – Xilinx announced the industry-first 15G/s Hybrid Memory Cube (HMC) interface for All Programmable UltraScale™ devices in collaboration with Pico Computing. Xilinx and Pico Computing are also members of the Hybrid Memory Cube Consortium (HMCC). Xilinx® UltraScale™ devices utilizing GTH transceiver technology support the full HMC bandwidth of four lanes and consist of 64 transceivers at speeds up to 15Gb/s. Pico Computing's HMC Controller IP achieves very high memory bandwidth and excellent performance/watt in a small yet highly scalable modular footprint. Through this combined solution, engineers can begin 15Gb/s HMC designs in applications such as high-performance computing, packet and waveform processing, and image and video processing.

Hybrid Memory Cube is a high-performance memory solution providing unprecedented bandwidth, power efficiency, and reliability. The HMCC has developed HMC technology specifications and has been building an ecosystem to enable broad adoption of this specification.

Tamara Schmitz, Director of Power Memory Technology Marketing at Xilinx, stated, "Customers can now deploy 15Gb/s HMC designs leveraging verified IP cores with the industry's only 20nm FPGA," and added, "UltraScale FPGA is currently the only device supporting all four HMC lanes. With the addition of transceivers for data path and control signals, it can also deliver maximum memory bandwidth."

Because Pico Computing's HMC Controller is highly parameterized, it enables optimized system configurations tailored to the specific design objectives of demanding customers. By "tuning" the number of addressed HMC links, the number and width of internal ports, clock speed, power, performance, area, and other parameters, the required performance can be calculated precisely.

Jammie Cummins, CEO of Pico Computing, stated, "Pico Computing's HMC Controller IP, now optimized and implemented for Xilinx's UltraScale devices, enables an extremely efficient and flexible solution," and explained, "Through this controller IP, both HMC and UltraScale devices can deliver their best performance, enabling an entirely new dimension of high-performance computing applications."