Hong Kong, July 1, 2014 – Altera (NASDAQ: ALTR) announced that it has significantly simplified the process for programmers to accelerate algorithms on FPGAs. Altera SDK for OpenCL version 14.0 includes a programmer-friendly and rapid prototyping design flow, enabling users to develop prototypes within minutes based on FPGA accelerator boards. Additionally, Altera and board partner companies provide various types of reference designs, reference platforms, and FPGA development boards that support Altera's OpenCL solution, further shortening FPGA-based application development cycles. By utilizing these reference platforms, development of custom FPGA accelerators that meet specific application requirements can also be simplified.

Altera is the only company formally offering a Software Development Kit (SDK) for OpenCL. Using this solution, programmers can develop algorithms using C-based OpenCL language and rapidly leverage FPGA performance and power efficiency. Altera SDK for OpenCL version 14.0 includes a rapid prototyping design flow that enables emulation, debugging, optimization, profiling, and recompilation of OpenCL kernel code to hardware implementation within minutes. Since recompiled kernels can be immediately tested and executed on FPGAs, programmers can reduce development time by several weeks.

Additionally, Altera and board partner companies provide various types of reference platforms, reference designs, and FPGA accelerator boards, further simplifying the process of deploying and running applications using FPGA accelerators. Altera provides multiple design examples showing how to implement applications in OpenCL, including an OPRA FAST parser for financial applications, a JPEG decoder for big data applications, and video downscaling for video applications.

Hardware teams wishing to develop their own custom solutions using a unique set of peripherals can save considerable development time by using reference platforms developed by Altera to create custom FPGA accelerators. These reference platforms include SoC platforms for embedded applications, high-performance computing (HPC) platforms, and low-latency network-capable platforms utilizing IO channels.

Altera SDK for OpenCL version 14.0 supports I/O channels enabling data streaming to FPGAs, and supports kernel channels enabling result reuse from one kernel to another through hardware pipelines, thereby achieving significantly enhanced performance and throughput with little to no host and memory interaction required. It also supports Altera's single-chip SoC solutions (Cyclone V SoC and Arria V SoC), where the host is an embedded ARM core processor integrated into the FPGA accelerator device.

Altera SDK for OpenCL enables programmers to rapidly utilize FPGAs' massive parallel architecture using OpenCL code. Programmers working with FPGAs can achieve higher performance at significantly lower power consumption compared to other hardware architectures such as GPUs or CPUs. On average, FPGAs can achieve higher performance at 1/5 the power consumption compared to GPUs. Through Altera's Preferred Board Partner Program for OpenCL, third-party boards supporting Altera's OpenCL solution are provided.