[Editor's Note] Headquartered in South Korea, Qualitas Semiconductor Co., Ltd. (hereinafter "Qualitas") is a leading company in the field of ultra-high-speed interconnect technology, providing advanced solutions for next-generation AI, automotive, mobile, and display sectors. Based on cutting-edge semiconductor process technology and expertise in high-performance circuit design, Qualitas develops highly reliable and silicon-verified IP solutions. These solutions enable customers to accelerate system integration, speed up new product development, and drive innovation.

With the advancement of ultra-high-speed interface technology, to maximize the performance of PHY IP, it is necessary to consider not only the chip characteristics but also the transmission loss and transmission/reflection characteristics of the entire interconnect channel, including the PCB (Printed Circuit Board) and socket. Furthermore, it is essential to establish a highly reproducible verification environment capable of accommodating various future package and interconnect structures.

To address these challenges, Qualitas used the Anritsu ShockLine™ Vector Network Analyzer (VNA) MS46524B. This enabled Qualitas to strengthen its ability to verify the signal integrity of the entire system, including PHY IP, thereby ensuring the quality and reliability of the solutions provided to customers.

Accordingly, this publication interviewed Executive Director Jaeyoung Kim, who is actively working at Qualitas Semiconductor's Optical Interconnect R&D Center. We asked him about how Anritsu's test solutions are being utilized in Qualitas's ultra-high-speed interconnect PHY IP solutions and what results have been achieved. This article introduces advanced verification technologies for securing the reliability of next-generation semiconductor interfaces and case studies on establishing quality assurance systems to maintain competitiveness in the global market.


■ I would like to hear about Qualitas' business and strengths.

Qualitas Semiconductor is a company specializing in the development of PHY IP solutions for ultra-high-speed interconnects, and possesses signal integrity technology, which is essential in high-bandwidth and high-speed signal transmission environments, as a core competitive advantage. We provide a broad and high-value portfolio of ultra-high-speed interface PHY IPs, including SERDES PHY IP, PCI Express® (PCIe®) PHY IP, UCIe (Universal Chiplet Interconnect Express) solutions, Ethernet PHY IP, MIPI and display solutions, SLVS-EC RX PHY IP, and USB SuperSpeed+ PHY IP.

Based on this technological competitiveness, Qualitas Semiconductor has signed numerous IP supply and cooperation agreements with leading customers in major global semiconductor markets, including the United States, China, and Japan, and has accumulated proven silicon references and mass production experience in various application fields and system environments.

Furthermore, through design capabilities optimized for advanced processes and complex system requirements, we minimize customer design complexity and integration risks, while supporting shortened development times and stable mass production. Based on these technological capabilities and a global customer base, Qualitas Semiconductor is continuously expanding its position as a trusted core technology partner in next-generation semiconductor interface markets, including AI, data centers, automotive, and chiplet-based systems.

■ I am curious why signal integrity verification has become more important in the recent development of ultra-high-speed interconnect PHY IP.

Recently, data transmission speeds of major interface standards such as PCIe, UCIe, USB, and Ethernet have been continuously improving. Consequently, there is an increasing demand for enhanced system transmission capacity and responsiveness, and various semiconductor products are also evolving toward higher performance and higher density. In such an environment, the performance of individual chips alone is no longer sufficient to guarantee the quality and reliability required in actual usage environments.

In real-world system environments, the entire interconnect channel, including not only the chip itself but also the PCB and socket, significantly impacts high-speed signal transmission. Losses, reflections, and crosstalk occurring along the transmission lines lead to a degradation of signal integrity. Therefore, comprehensive and accurate signal integrity verification that considers all these factors is essential. Particularly as speeds increase, even minute changes in interconnect characteristics can directly affect overall system stability and data quality, requiring verification methods more precise than ever before.

I would like to hear what plans Qualitas is pursuing to address these technical challenges.

In response to the advancement of the ultra-high-speed interface market and increasingly sophisticated customer demands, Qualitas is transitioning from traditional simulation-based verification to a pre-verification system that closely resembles real-world environments. Specifically, it has introduced a proprietary method to quantitatively verify signal integrity using parameters such as differential S-parameters and Time Domain Reflectance (TDR) after implementing IP chips in packages and PCBs. This approach enables the securing of system-level reliability from the early stages of development and allows for the delivery of high-quality, practical PHY IP to customers.

If you were to explain the background and technical issues of these plans

The background of this plan was the limitation that existing simulations alone could not perfectly reproduce signal integrity characteristics, such as loss, reflection, and crosstalk between transmission lines, that occur in actual implementation environments. As a result, there were constraints in shortening design cycles and meeting customers' demanding reliability requirements. Customers worldwide are strongly demanding the submission of more quantitative and reproducible verification data. In light of this situation, it was necessary to strengthen signal integrity verification capabilities and lay the foundation for future application to various package structures and next-generation interface technologies.


■ I would like to hear about the decisive reason for choosing the Anritsu Shockline VNA MS46524B and the results achieved as a result.

When introducing the VNA, we compared products from various test and measurement equipment manufacturers. The primary reason for selecting Anritsu’s ShockLine VNA MS46524B was its comprehensive strengths not found in other companies’ products, such as measurement stability in high-frequency bands, flexible adaptability to environments with mixed probes and coaxial cables, and workflow optimization through customized software.

The MS46524B enables stable measurements thanks to its 4-port configuration. Furthermore, by utilizing Anritsu's proprietary expandable K-type connector technology, it allows for stable data acquisition even in probe-based measurements. In addition, it supports high-resolution TDR measurements of less than 10 picoseconds, enabling highly precise verification of small packages and minute impedance changes. Thanks to these features, the introduction of the VNA enabled the establishment of an environment where PCBs and test chips could be efficiently verified on a single platform. Moreover, it shortened verification cycles and significantly reduced the time required to submit quality evaluation reports to global customers. As a result, Qualitas' customers can implement more stable IP in a shorter amount of time, reducing product development risks and shortening time to market.

Representative methods for verifying interconnection characteristics in both the frequency and time domains include differential S-parameter measurements and differential TDR measurements. Differential S-parameter measurements allow for the quantitative evaluation of channel insertion loss, reflection characteristics, and differential transmission characteristics, enabling a numerical assessment of overall signal transmission performance. On the other hand, differential TDR measurements offer the advantage of intuitively capturing not only impedance discontinuities within packages and PCBs but also subtle structural issues in the time domain. Utilizing these two methods in parallel allows for not only verification of specification compliance but also the analysis of root causes from multiple perspectives in the event of problems. Consequently, high-quality feedback can be obtained during the PHY IP design phase, playing a crucial role in establishing a virtuous cycle of design, verification, and improvement.

■ I would like to hear about the problems you encountered and how you resolved them while building the ultra-high-speed interconnect verification environment.

The key challenges in establishing a probe-based non-coaxial (probe-coaxial, probe-probe) verification environment were 'establishing a reference plane' and ensuring measurement reproducibility. In particular, when verifying ball-pad type packages or precision PCB patterns, variations in probe contact status or position caused fluctuations in verification results, making precise signal integrity verification difficult. To address these issues, a 4-port test environment supporting both probe-coaxial and probe-probe measurements was established using the ShockLine VNA MS46524B. Additionally, Type-E network extraction technology and de-embedding techniques were actively applied, and probe station connection conditions and verification procedures were standardized. Furthermore, by automating the process through Anritz's customized software, the stability and reproducibility of the verification were significantly improved.

■ I am curious if there are any issues that need to be resolved in probe-based verification.

Probe-based measurements are essential for high-speed interface verification, but it is crucial to minimize discrepancies with the actual system environment. For this reason, Qualitas designs and utilizes evaluation boards (EVBs) that faithfully reproduce actual package structures and PCB layouts, in addition to pad-level measurements, to perform verification. Furthermore, differential S-parameter and differential TDR measurements are performed in parallel in both probe-coaxial and probe-probe environments, and the characteristics of each measurement method are quantitatively compared and analyzed. As a result, signal integrity characteristics close to actual usage environments can be evaluated in advance, contributing to improved prediction accuracy and IP reliability for customer systems.

De-embedding technology is considered very important in the signal integrity verification process of ultra-high-speed interconnects. Could you explain how Qualitas utilizes de-embedding technology and what its effects are?

For ultra-high-speed interconnects, external components such as probes, cables, and adapters included in the measurement system affect the measurement results, making correction using de-embedding technology essential. In a 4-port measurement environment using the MS46524B, Qualitas pre-extracts the S-parameters of the probes and adapters. Then, by applying de-embedding technology, the intrinsic characteristics of the DUT (Device Under Test) can be accurately verified.

This method can significantly reduce measurement errors related to insertion loss and impedance characteristics, and enables reliable signal integrity verification even in high-loss channels or micropackage structures. In addition, the verification results are utilized as specific feedback during the PHY IP design phase to help optimize the design and improve quality.

■ I am curious about how the establishment of the verification environment has impacted Qualitas's intellectual property quality and future technology development strategy.

The introduction of Anritsu’s ShockLine VNA MS46524B has enabled the establishment of a pre-verification system for package and interconnect performance at the IP vendor level. This has allowed for efficient, repeatable measurements in the high-frequency range, while Anritsu’s customized software has significantly improved verification reproducibility and operational efficiency. Consequently, differential pre-verification across PCBs, packages, and test chips has become possible, providing end users with even higher IP quality reliability. Moving forward, based on this verification environment, we plan to expand to various package structures and next-generation high-speed interface technologies to further strengthen Qualitase’s competitiveness in signal integrity.

■ I would like to know how Qualitas plans to further advance the signal integrity verification environment as it prepares to support next-generation ultra-high-speed interfaces.

With the advancement of future interface technologies, the diversification of package structures, the proliferation of chiplet-based architectures, and the continuous acceleration of data transfer speeds, signal integrity verification is expected to become increasingly challenging. Qualitatis is focusing on building a highly reproducible verification environment capable of accommodating more complex package and interconnect structures, as well as enhancing differential measurement capabilities in high-frequency bands. By continuously expanding its signal integrity verification platform centered on probe-based measurement software integrated with the ShockLine VNA MS46524B, Qualitatis is further strengthening support for next-generation standards such as UCIe and PCIe Gen6. Furthermore, we aim to contribute to the overall quality improvement of the semiconductor interface field by actively participating in industry standardization activities and joint research with other companies.

■ I would like to hear your opinion on what factors are necessary for ultra-high-speed interconnect developers to further strengthen their competitiveness in the global market.

For developers of ultra-high-speed interconnects, the most important factor is not only providing IP that meets specifications but also demonstrating high reliability in the customer's actual system environment. Global customers may require the submission of signal integrity verification results for the entire interconnect, including packages, PCBs, and sockets, in addition to advanced IP performance verification.

Qualitas establishes a pre-verification system in actual package and PCB environments from the early stages of IP development to objectively evaluate IP quality using quantitative data such as differential S-parameters and TDR. Furthermore, by utilizing high-reliability test solutions such as the ShockLine VNA MS46524B, it has established a system capable of proactively providing verification data that meets the requirements of global customers. This has become a key differentiating factor in securing Qualitas' technical reliability and competitiveness in winning orders.

■ If you could talk about any aspects or plans that were particularly impressive in your collaboration with Anritsu?

In this collaboration, Anritsu not only supplied VNA equipment but also demonstrated a deep understanding of our verification environment and workflow, providing technical support tailored to our specific needs. In particular, by jointly developing customized software capable of efficiently executing high-frequency measurements and complex procedures, we significantly improved operational efficiency and measurement reliability. As a result, we have established a trusted relationship that enables the continuous expansion of the technology development and verification environment even after the introduction of VNA equipment, and laid the foundation for long-term cooperation as a technology partner in the field of next-generation interface verification.

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※ The case study PDF related to the above interview can be downloaded below.