April 28, 2015 – Arteris (www.arteris.com), the sole provider of mass-produced Network-on-Chip (NoC) IP solutions, announced interconnect fabric IP for FlexNoC Version 3 (v3) to help chip designers create more sophisticated and faster chips.

Arteris FlexNoC Version 3 addresses the explosive complexity of SoCs driven by the growth of mobile phones, consumer electronics, automotive, and home appliances, helping designers achieve their desired time-to-market. To enhance the productivity of SoC designers, FlexNoC Version 3 includes the following features:

Switch-based Topology Editor – Facilitates the process of creating, characterizing, and tuning large designs while maintaining access to the entire SoC topology within a single view.

Topic and Activity-Based User Interface – A streamlined interface based on years of research into customer feedback and human factors helps make complex and repetitive tasks in SoC conceptualization and design easier.

NoC Configuration Improvement – Allows designers to easily stop inter-designing small modules that follow-up teams intend to implement, and enables the rapid integration of separate designs or modules into a single interconnected instance.

FlexNoC v3 provides a foundational platform necessary for the development of future IP technologies.

Charles Zanac (K. "Atheris FlexNoC version 3 enables customers to scale the design capacity of their chips to meet the complexity and schedule of their SoCs," said Charles Janac. "This significant technological advancement not only improves the framework for SoC creation and assembly but also provides a technology foundation with innovative new features built in."

Atheris FlexNoC is an industry-standard SoC interconnect fabric IP that enables on-chip communication for complex SoCs, created by several global companies including Samsung, Renesas, HiSilicon, Altera, and Mobileye.

Purchase Information

Arteris FlexNoC Version 3, an Arteris FlexNoC interconnect IP, is currently available for immediate supply.