June 8, 2015, Seoul, Korea — Freescale Semiconductor (www.freescale.com, CEO Yeonho Hwang) announced the industry's first fully software-programmable Digital Front End (DFE) System-on-Chip (SoC) for cellular base station wireless. This device effectively eliminates the need for hardware logic design, allowing customers to focus more on software development and product completion.

The new AFD4400 contains the hardware necessary to implement wireless digital functions in a single device. Combining this solution with Freescale’s comprehensive reference design and programming tools enables easier, faster, and more efficient wireless design. Furthermore, the AFD4400 is designed to seamlessly integrate with Freescale’s wide range of second-generation Airfast RF power transistor and RFIC families, supporting optimal performance in broadband systems ranging from existing macro base station radios and Remote Radio Heads (RRHs) to small cell base stations and active antenna array systems.

In the case of existing design processes, namely ASIC and FPGA-based solutions, cellular wireless development can be slow because multiple stages of hardware logic development are required depending on the software development and product completion stages. This is not only complex and costly and time-consuming, but also, particularly in the case of the ASIC method, it is impossible to quickly implement changes to wireless standards, frequency bands, signal bandwidths, etc., because the functionality of the ASIC is fixed once manufactured.

The AFD4400 is a solution that changes this paradigm by enabling designers to fully program, optimize, and modify wireless via software without hardware changes. The AFD4400 seamlessly integrates with Freescale’s second-generation Airfast RF power solution, which is available across almost all bands worldwide and supported by reference designs, evaluation boards, and other tools, thereby simplifying the addition of frequency bands and the modification of RF output levels.

"Paul Hart, Executive Vice President and General Manager of Freescale's RF Business Unit, said, 'Freescale's new AFD4400 redefines wireless design standards for cellular base stations by dramatically streamlining development cycles, enabling companies to differentiate their solutions and achieve success by focusing on software and proprietary IP in a highly competitive system design market. This product adds immense value to customers and is a testament to Freescale's commitment to RF technology innovation and leadership.'"

The AFD4400 signal processing subsystem utilizes an array of vector signal processing cores based on the Freescale VSPA (Vector Signal Processor Accelerator) architecture. These cores perform most functions using floating-point operations while supporting the maximum possible dynamic range, and also offer the additional advantage of accelerating the conversion speed from algorithm development to product realization. The vector processor array has a total processing power of 1.76 teraflops and is divided into transmit, receive, and adapt paths, providing the performance required to support LTE, WCDMA, CDMA, and GSM networks in both single and multi-mode configurations.

The AFD4400 can accommodate up to 100 MHz of instantaneous bandwidth in a 4-antenna MIMO configuration and a much wider bandwidth in a 2-antenna MIMO system, along with 2x2, 4x4, and 8x8 MIMO (Multiple Input and Output) antenna configurations. Since power control is dynamically applied to individual processing elements, wasted power can be reduced in light-load applications.

Wide range of development tools

Freescale supports the AFD4400 with a comprehensive set of hardware and software development tools. The development kit includes a modular AFD4400 RDB (Reference Design Board), several selectable transceiver cards, a shielded chassis, an RF power amplifier reference palette, host and control software for easy system setup and configuration, and a quick start guide.

A comprehensive signal processing reference library facilitates the transition from hardware-centric to software-based signal processing, and integrated reference application software optimized for Freescale Airfast power amplifiers supports rapid evaluation of DPD performance across most cellular frequency bands and RF output levels. This library includes a wide range of filter functions, interpolation/decimation building blocks, FFT/IFFT functions, LLS/RLS algorithms, CFR (crown height reduction), and DPD subsystems up to 983 MSPS. The signal processing library has been enhanced with bit-exact MATLAB® functions to enable rapid system prototyping during the algorithm development and integration process.

Freescale CodeWarrior Development Studio provides a comprehensive Eclipse-based software development environment for the VSPA signal processing core, and includes an optimizing compiler, assembler, linker, and an exact cycle instruction set simulator.

Supply situation

Samples of the ASD4400 are currently being supplied, and mass production is scheduled for the third quarter of this year. Further details can be found at www.freescale.com/RFpower.

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