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Siemens EDA, "In the 'AI-Native Era,' AI Designs and Verifies Itself"

Google 우선 소스Published2026.08.11 16:51
Ankur Gupta, Senior Vice President of the IC Product Division at Siemens EDA, presenting at the press briefing for 'Siemens EDA Forum Seoul 2026'.

Evolution from Simple Design Support Tools to Intelligent Systems Performing Autonomous Tasks and Verifying Results

Optimizing Not Only AI Agent Inference Capability but Also Tool Invocation Reliability, Security, and Token Costs


"Siemens EDA's 'AI-Native Design' will shorten semiconductor design time through faster engines and intelligent execution based on agentic AI, while ensuring accuracy with physics-based EDA engines to simultaneously enhance semiconductor development speed and productivity."


Siemens EDA unveiled its next-generation semiconductor and system design strategy at the Siemens EDA Forum Seoul 2026, held on the 11th at the Lotte Hotel in Jamsil, Seoul.


At the press briefing, Ankur Gupta, Senior Vice President of the IC Product Division at Siemens EDA, identified 'AI Everywhere,' 'software-defined infrastructure systems,' 'heterogeneous integration,' and 'sustainability' as the key trends driving the EDA market in the AI era.


As AI acceleration capabilities spread across various chips, collaborative design of hardware and software becomes increasingly important, and the practice of combining dies with different processes and functions into a single advanced package is becoming commonplace.


With rising power consumption in high-performance AI chips and data centers, power efficiency has also become a critical consideration from the early stages of design.


These changes significantly increase the number of design variables and verification tasks that EDA must handle.


In advanced semiconductors, even a small error can lead to chip failure or reduced yield.


This is why it is necessary to increase design speed while ensuring reliable results that comply with semiconductor physics principles.


Senior Vice President Ankur Gupta organized the AI-native strategy in response to these challenges around three axes: 'faster engines,' 'smarter execution,' and 'trustworthy results.'


The essence of AI-native is not limited to simply connecting existing EDA engines with generative AI.


Multiple AI agents divide and perform design and verification tasks, using physics-based EDA engines as the 'source of truth' to verify results and correct errors autonomously.


A typical example is a long-duration autonomous workflow where an engineer inputs design goals in natural language before leaving work, and agents spend the night characterizing libraries, validating results, debugging problems, and making corrections.


The central platform enabling this is the 'Fuse EDA AI Agent' system.


Siemens EDA combined NVIDIA's Nemotron model with NeMo Gym, OpenShell secure runtime, and CUDA-X accelerated computing with Fuse and its own EDA engines.


The concept is to optimize not only the inference capability of AI agents but also tool invocation reliability, security, and token costs.


Notably, in the Solido-based library characterization workflow, processing time has been reduced by more than tenfold and token costs have been cut by 5 to 10 times.


The company also emphasized openness that is not dependent on any specific AI model.


Senior Vice President Ankur Gupta explained, "The model ecosystem is changing very rapidly, and committing to a single model could actually slow down the pace of innovation."


Fuse is architected as a layer that connects EDA engines, AI models, and development environments, enabling customers to choose not only NVIDIA's Nemotron but also OpenAI, Google, and Anthropic models.


It also supports the 'Bring Your Own Model' approach utilizing companies' internal data and models, as well as on-premises operations.


AI agents are also being deployed in verification, one of the largest bottlenecks in semiconductor design.


Questa One Agentic Toolkit provides agents specialized in planning, RTL code generation, lint, CDC, debugging, and regression testing.


MediaTek evaluated that engineers could master tasks that previously required weeks of training in just a few hours.


ATPG simulation combining Questa and Tessent delivers results 3 to 5 times faster than existing methods, and Siemens EDA is targeting 10x acceleration in the long term.


The scope of the AI-native strategy extends beyond individual chips.


Siemens EDA is expanding AI agent functionality across its IC and PCB portfolio, including Catapult, Questa One, Veloce, Aprisa, Solido, Calibre, Tessent, and Xpedition.


The company plans to build a digital thread connecting chip to system by linking package and board, mechanical stress and thermal simulation, and product lifecycle management technologies.


In 3D IC, multiphysics analysis such as thermal and stress becomes as important as electrical verification, so the strategy is to leverage the company's strengths as a comprehensive industrial software company.


Senior Vice President Ankur Gupta evaluated Korea as a market leading in memory and AI chip and accelerator design.


Siemens EDA continues to expand its workforce in Korea while viewing AI design, 3D IC, and software-defined systems as key growth areas.


Senior Vice President Ankur Gupta stated, "What AI-native EDA aims for is not automation that replaces engineers, but rather allowing AI to take on repetitive execution burdens so engineers can invest more time in structural innovation and design decisions. The ability to simultaneously enhance design speed, productivity, and result reliability will be what determines competitiveness in the EDA market going forward."



Senior Vice President Ankur Gupta and Vice President Lincoln Lee answering journalists' questions in the Q&A session.


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