June 16, 2015 – Silicon Labs, a company specializing in high-performance timing solutions for internet infrastructure (

Silicon Labs (Country Manager: Woon-dal Baek) announced the launch of a new clock IC (product name: Si5380) boasting the industry's highest level of integration, suitable for wireless infrastructure applications such as small cell and macro cell base stations. Silicon Labs' new Si5380 clock generator is the industry's first clock IC capable of replacing low-phase-noise integer-N clocks, voltage-controlled crystal oscillators (VCXOs), discrete loop filters, and voltage regulator components into a single-chip device . The Si5380 clock achieves groundbreaking technological advancements in terms of solution footprint, bill of material (BOM) costs, power consumption, performance, and ease of use, while providing superior phase-noise performance compared to existing discrete solutions .

According to recent research by Cisco, the volume of global mobile data traffic will increase nearly tenfold from 2014 to 2019 as the widespread adoption of video streaming services and IoT-connected devices drives the market. While base station vendors are developing new 4G/LTE equipment to increase network capacity and range, designing for small cells is becoming increasingly difficult in dense urban environments because these devices are space-constrained and installed outdoors at low power. Silicon Labs' new Si5380 clock is the industry's first single-chip wireless clock IC optimized for size, power, integration, and performance , making it ideal for small cell applications.

The Si5380 clock incorporates Silicon Labs' latest 4th generation DSPLL technology to provide a solution specifically designed for next-generation small cell and macro cell RRH (remote radio head) designs . The DSPLL technology

The innovative dual-loop mixed-signal architecture integrates a single high-performance 15GHz analog voltage-controlled oscillator within a digital phase-locked-loop (PLL) architecture, eliminating the need for discrete loop filters and low-drop-out (LDO) regulators. As a result, this clock solution provides the optimal combination of an industry-leading PLL and ultra-low phase noise clock synthesis capabilities.

The Si5380 clock has a 66% smaller printed circuit board compared to competitors' VCXO-based clock IC solutions.

It features a smaller footprint and 30% lower power consumption. Power-efficient timing components are particularly important in small cells where Power over Ethernet (PoE) technology is frequently used for power supply within today's limited power budgets. Because DSPLL technology integrates all PLL and power supply regulation elements, the Si5380 device offers high board-level noise immunity, integrated power noise rejection, and all operating temperatures

It can provide phase noise performance that is consistent and repeatable over the range.

While VCXO-based clock solutions suffer from degraded spurious performance when oscillations occur, the integrated DSPLL technology in the Si5380 device provides excellent spurious response regardless of the system environment. Furthermore, the Si5380 clock ensures low phase noise operation even when synchronized with high-jitter input clocks, preventing data converter performance from degrading due to external influences. The Si5380 generates 4G/LTE frequencies up to 1.47456 GHz and provides up to 12 independently configurable clocks, allowing it to be used as a JESD204B compliant data converter, FPGA, and other logic device.

James Wilson, Marketing Director of Timing Products at Silicon Labs, said, “The Si5380 clock is the industry’s most integrated timing solution available for macro and small cell base stations requiring a compact PCB footprint, low power consumption, and robust carrier-grade phase noise performance in various environmental conditions. Silicon Labs’ highly integrated DSPLL-based clock architecture and easy-to-use ClockBuilder Pro software very simply solve the problems of clock synthesis and jitter attenuation for today’s heterogeneous wireless networks.”

Simplifying the Clock Tree Using ClockBuilder Pro

To simplify the design of clock trees for wireless base stations, Silicon Labs’ ClockBuilder Pro software enables designers to program the Si5380 clock in five minutes and minimizes software development overhead. Instead of waiting months for custom clock devices, designers can simply upload custom configuration environments to Silicon Labs via ClockBuilder Pro.

Pre-programmed Si5380 clock samples from the factory are shipped within two weeks, and the entire product development process can be accelerated with the industry's shortest lead time for customized samples.

Product Price and Purchase Information

Factory-pre-programmed samples and production quantities of the Si5380 clock are currently available. Pricing starts at less than $6 per unit for 10,000-unit quantities. The Si5380-EVB evaluation board is currently available and is priced at $399 (USD MSRP). This evaluation board allows developers to quickly move from the device configuration environment stage to detailed performance evaluation . ClockBuilder Pro software is available for free on the Silicon Labs website. For detailed information on Silicon Labs' Si5380 ultra-low phase noise clock generator, as well as to order samples and evaluation boards and download ClockBuilder Pro, please visit www.silabs.com/clocks.