Altera Provides Industry's First Integrated 100G EFEC Solution for FPGA Design

Rapid migration to 100G possible using Enhanced Forward Error Correction technology

Hong Kong, March 8, 2011 — Altera (NASDAQ: ALTR) announced that it is providing the industry's first integrated enhanced forward error correction (EFEC) IP cores optimized for use with high-performance Stratix® IV and Stratix V series FPGAs. These EFEC7 and EFEC20 are multidimensional IP cores developed at Altera's Newfoundland Technology Centre (formerly Avalon Microelectronics) and are designed specifically for 100G applications, such as metropolitan and long-distance optical transport networks (OTN).

Today, service providers are upgrading 10G metropolitan and long-distance OTN networks to 100G speeds to meet the ever-increasing bandwidth demands for video data, and are also planning to migrate to 400G in the future. Furthermore, these network backbones must operate over fiber optic distances 25 to 50 percent longer while reducing power consumption, costs, and latency. Altera's EFEC IP core enables the achievement of the performance and error-free transmission required over longer distances.

"Don Faria, Senior Vice President of Communications and Broadcast Business at Altera, said, 'With the combined global market for 10G, 40G, and 100G transceivers and transponders projected to grow to over $2 billion in 2014, Altera is ready to provide a flexible silicon platform with superior performance using custom IP. As the first company to be able to provide an integrated single-source 100G solution, we are now able to rapidly meet market demand for next-generation optical networks.'"

Altera's EFEC7 and EFEC20 are extremely high-gain hard-decision FEC cores that enhance 100G networks and enable the implementation of FPGA-based EFEC in the industry's smallest size today. EFEC7 and EFEC20 provide the best gain for the G.709 standard using Streaming Turbo Product Code BCH code (SPC-BCH), at 7 percent and 20 percent over, respectively.