Enhancing Productivity and Innovation in SoC Design with Xilinx Connectivity, Embedded, and DSP Kits

Virtex-6 FPGA and Spartan-6 Kit equipped with ISE Design Suite 11.4 shorten development time by focusing on competitive differentiation.

In December 2009, Xilinx announced six new development kits as part of its target design platform, which enables developers to focus on innovation and differentiation when designing with FPGAs. This platform, designed for the existing Virtex-6 and Spartan-6 product families, reduces the time required to achieve low power consumption levels and optimal system performance during SoC development. Additionally, these new kits target the construction of systems requiring embedded processing, DSPs, and high-speed serial connectivity by providing design teams with a tool suite optimized for the design flow, fully functional IP fed back from over 100 vendors, and target reference designs common to their specialties.

Connectivity development
The connectivity development kit includes a target reference design that enables fully scalable PCI Express to run on XAUI or Gb Ethernet bridges by combining hard blocks within the FPGA with Xilinx connectivity IP and key third-party IP from Northwest Logic, a Xilinx Alliance member. Customers can choose from fully certified PCIe Gen1 or Gen2 x1, x2, or x4 for the Virtex-6 FPGA kit. Additionally, by synchronizing with DMA configurations, system bandwidth, data reading and writing from external DDR3 memory, and connectivity for the entire XAUI interface within the system environment can be optimized. With the Spartan-6 FPGA kit, designers can connect fully certified PCIe Gen1 to Gb Ethernet using Northwest Logic's fully licensed DMA engine IP. The two kits enable designers to measure system bandwidth and optimize the settings of the host system environment to reduce power and costs. The pre-installed target reference design is optimized to demonstrate a fully functional connectivity system utilizing four clock domains (operating at up to 250 MHz).