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Xilinx Releases Vivado Design Suite HLx Edition with 30% Performance Boost

Google 우선 소스Published2016.04.21 17:17
Solving System Interconnect Bottlenecks in High-Density, Multi-Million System Logic Cell Designs

Xilinx announced the release of Vivado Design Suite HLx Edition 2016.1, which expands its SmartConnect technology.

This release delivers exceptional levels of performance across the UltraScale and UltraScale+ device portfolio.


Additionally, in this 2016.1 release, the Vivado Design Suite extends its SmartConnect technology to address the system interconnect bottleneck in high-density, multi-million system logic cell designs, enabling the UltraScale and UltraScale+ device portfolio to deliver 20-30% higher performance.

Xilinx's UltraScale+ portfolio is a FinFET-based programmable technology that includes Zynq, Kintex, Virtex, and UltraScale+ devices.

It also delivers 2-5x higher performance per watt than 28nm devices, enabling applications such as 5G wireless, software-defined networks (SDN), and advanced driver assistance systems (ADAS).

Xilinx SmartConnect technology includes system interconnect IP as well as new optimizations driven by UltraScale+ silicon innovations:
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