Extended battery life for wireless sensors and implantable medical devices with ultra-low voltage performance
Korea, October 11, 2011 – STMicroelectronics ( www.st.com ), a world-leading integrated semiconductor company, and MIT's Microsystems Technology Laboratory (MTL) announced the results of an advanced R&D project on low-power microprocessor technology at this year's European Solid-State Circuits (ESSC) conference held in Helsinki, Finland. This voltage-scalable 32-bit microprocessor system-on-chip (SoC) combines exceptional performance with outstanding energy efficiency, making it suitable for applications in the medical, wireless sensor network, and mobile sectors where power budgets are limited and processing loads fluctuate over time.
Alessandro Cremonesi, Vice President of Strategy and Systems Technology Group and General Manager of Advanced Systems Technology at STMicroelectronics, said, “By utilizing this innovative technology, we have been able to develop a whole new level of microprocessors for applications where minimizing power consumption and extending battery life are essential, such as wireless sensors and implantable medical devices. Through the collaboration between ST and MIT, we have been able to open new horizons for ultra-low power technology.”
Anantha Chandrakasan, Chair of the EECS (Electronic, Electrical and Computer Engineering) Department at MIT, said, “We are pleased to develop an ultra-low-power microprocessor SoC in collaboration with STMicroelectronics. MIT researchers and STMicroelectronics engineers collaborated to develop and implement various architectures and circuit techniques to reduce power consumption.” “This energy-efficient processor will enable interesting sensor network applications, such as implantable biomedical systems,” he said.
The ST-MIT joint microprocessor SoC, utilizing ST's 65nm CMOS process technology, reduces power consumption to 10.2 pJ/cycle at 0.54V and uses SRAM memory cells operating at a 0.4V array voltage. Additionally, it further reduces memory access power consumption by using a small latch-based instruction and data cache at the first layer level. Furthermore, by integrating peripherals such as on-chip ultra-low power clock generation and analog-to-digital conversion, timers capable of operating with minimum voltage power supplies, and serial interfaces, this SoC can be implemented as a miniaturized and comprehensive system.
ST is a member of the Microsystems Industrial Group (MIG) under MIT's Microsystems Technology Laboratories (MTL). MIG is an industrial consortium that supports MTL's infrastructure and provides guidance regarding the institute's research and educational goals in consultation with the faculty. ST has collaborated with leading educational and research institutions around the world for many years, enabling the combination of its accumulated industrial experience and knowledge with the research capabilities and rich talent pools of these institutions.















