Launch of Multi-Output Regulator Integrating Supervisor and Watchdog Timer to Reduce Component Count and Increase Integration and Stability
- Integrates one high-efficiency 3MHz 1.2A buck regulator and two 300mA Low Dropout Regulators (LDOs) into a small 20-lead LFCSP package
- Implementing a high-density IC solution that enhances performance and stability and reduces system costs based on just 9 components and a board area of 50mm²

January 17, 2012 – Analog Devices ( www.analog.com ), a global leader in high-performance semiconductors and a leader in the global data converter market, introduced the ADP5041 and ADP5040 multi-output regulators, which enable designers of industrial, medical, and telecommunications equipment to easily improve power system performance by reducing board area. These regulators meet the ever-increasing requirements for high power density by integrating one high-efficiency 3 MHz 1.2 A buck regulator and two 300 mA Low Dropout Regulators (LDOs) into a small 20-lead LFCSP package. Unlike typical discrete solutions that require up to about 14 components and a board area of 126 mm², these regulators, boasting high integration, provide a high-density, high-performance IC solution that enhances performance and stability and reduces system costs based on just 9 components and a board area of 50 mm².
Additional Information on ADP5041 and ADP5040 Multi-Output Regulators
The ADP5041 and ADP5040 are power management products suitable for mid-range FPGA, microprocessor, and DSP systems where core, I/O, and memory voltages are critical. The on-chip watchdog timer of the ADP5041 regulator monitors the code execution integrity of processor-based systems with excellent reliability and resets the processor if it does not operate within a preset timeout. The ADP5041 features an externally programmable, highly accurate reset generator (±1.5% over the operating temperature range) to monitor low-voltage power supply rails. Additionally, it is supplied with various options to handle different reset and watchdog timings.
The ADP5041 has a special circuit that detects three-phase conditions when a watchdog refresh input is applied to a WDI pin, which is typically controlled by a processor/DSP output port. When the processor sets this port to three-phase mode, the watchdog refresh timer is disabled, blocking a watchdog reset for the processor. This specification plays an important role when supporting processor/DSP sleep mode operation where the core is disabled and the watchdog timer cannot refresh.
The ADP5041 and ADP5040 multi-output regulators use high-efficiency switching regulators with up to 96% buck power efficiency to reduce heat dissipation. For low-noise analog circuit applications, this product's LDO operates with low headroom voltage while maintaining a Power Supply Rejection Ratio (PSRR) of over 60dB at frequencies as high as 10kHz. It also features a 3-rail system power supply (a 1.2A buck regulator and two 300mA LDOs) capable of adjusting output voltage, allowing for easy setting of various output voltages using an external resistor divider network. Additionally, the 3MHz buck regulator switching frequency enables the use of small ceramic inductors, further reducing the size and cost of the overall solution. Based on all these specifications, the ADP5041 and ADP5040 can be easily and quickly modified to suit a variety of applications with short product design schedules, such as portable medical and industrial devices.
Key Specifications of ADP5041 and ADP5040 Multi-Output Regulators:
• 1 x 1.2A buck regulator
Output voltage range = 0.8V~3.8V
Current mode topology for excellent transient response
Operating frequency of 3 MHz
Up to 96% peak efficiency
Overall regulator accuracy: ±3%
• 2 x 300mA LDOs
Output voltage range = 0.8V~4.75V
Low input supply voltage = 1.7V~5.5V
Stable operation via 2.2μF ceramic output capacitor
High PSRR = 60dB (up to 10kHz)
Low output noise = Average output noise of 60μV rms at 1.2V
Low dropout voltage = 150mV at 300mA load current















