Western Digital unveiled an X4 (4 bits per cell) flash memory architecture based on BiCS3, a 64-layer 3D NAND technology.

Western Digital’s newly announced BiCS3 X4 technology provides the industry’s highest single-chip storage capacity of 768Gb, a 50% improvement over the existing X3 (3 bits per cell) architecture-based 512Gb chip.

It is expected to be commercialized in various forms, such as SSDs and removable memory, to suit the characteristics of diverse environments requiring high-capacity storage, regardless of whether they are for individuals or businesses. It is also expected to be incorporated into next-generation 3D NAND technologies, including 96-layer 3D NAND (BiCS4), in the future.

Western Digital successfully developed this BiCS3 X4 technology through vertical integration that systematically manages the entire process from development to production and sales, along with the experience in X4 technology development and commercialization accumulated in the 2D NAND field. This vertical integration includes precise silicon wafer processing and device engineering to implement 16 data levels in a single storage node, as well as system expertise for overall flash management.

"With the implementation of the X4 architecture based on 64-layer 3D NAND, Western Digital has demonstrated its leadership in NAND flash technology and is now able to offer a wider range of storage solutions to customers," said Siva Sivaram, Senior Vice President of Memory Technology at Western Digital. "In particular, given that this BiCS3 X4 technology has achieved performance close to that of the existing 64-layer 3D NAND-based X3 architecture through technological innovation, it will generate widespread demand in the future storage market."