March 14, 2012 – Synopsys, Inc., a global developer of software and IP for electronic components and systems design, verification, and manufacturing, and Arteris, Inc. (Country Manager: Yeon Myeong-heum), a leading provider of Network-on-Chip (NoC) interconnect IP solutions, announced today a joint analog and digital IP solution that implements the MIPI–LLI (Low Latency Interface) 1.0 specification. This joint solution is characterized by interoperability with the MIPI standard as well as providing low power and high performance in a compact silicon footprint. By developing a joint solution faithful to the LLI standard, Arteris and Synopsys provide pre-tested and optimized analog and digital MIPI-based IP, enabling SoC designers to lower design costs and accelerate time-to-market.

The MIPI-LLI specification enables high-bandwidth low-latency inter-chip (LLI) communication between two chips using a minimum number of SoC pins. LLI utilizes the MIPI M-PHY physical layer and supports five other protocols, including USB SSIC, JEDEC UFS, MIPI CSI-3, DSI-2, and DigRF v4. The round-trip latency of LLI interchip connections is fast enough for mobile phone modems to share application memory while maintaining sufficient throughput and low latency for cache refills. Consequently, mobile phone manufacturers can eliminate the modem's dedicated RAM chip from the phone's Bill of Materials (BoM). MIPI’s LLI subcommittee stated that this can save printed circuit board space and about $2 per mobile phone, allowing for the addition of features or the manufacture of smaller and slimmer devices.

"As active MIPI members, Arteris and Synopsys are helping to expand MIPI M-PHY and MIPI LLI," said Joel Huloux, Chairman of the MIPI Board of Directors. "Integrating and using Arteris and Synopsys solutions early on helps companies adopting MIPI LLI shorten their time to market."

The joint solution introduced this time consists of Arteris’ FlexLLI™ MIPI LLI digital controller IP and Synopsys’ DesignWare® MIPI M-PHY IP. Engineering teams from Arteris and Synopsys, formed to facilitate the verification and testing of the joint solution, have completed verification of the solution’s functionality and compatibility.

Charlie Janac, President and CEO of Arteris, said, “The Arteris and Synopsys joint MIPI LLI solution is the easiest and most risk-reducing path to adopting MIPI LLI,” adding, “Arteris and Synopsys have collaborated to provide a highly integrated LLI solution to our joint customers that enables rapid time-to-market and minimizes design risks.”

John Koeter, Vice President of IP and System Marketing at Synopsys, said, “This MIPI LLI solution from Atheris and Synopsys facilitates the adoption of innovative Chip-to-Chip (C2C) interfaces by providing high-quality IP that has been jointly validated by both companies and is ready for customers to rapidly integrate into their SoCs. With the increasing demand for displays, cameras, and broadband mobile connectivity in consumer devices, SoC designers must use validated IP that has proven compatibility with MIPI standards such as DSI, CSI-2, D-PHY, DigRF 3G/v4, and M-PHY.”

Product supply
The joint MIPI LLI IP solution from Arteris and Synopsys is being supplied to select early support customers for use in their designs. System hardware incorporating this solution is also scheduled to be introduced in the second half of 2012.

More information about Arteris' FlexLLI MIPI LLI digital controller IP can be found at www.arteris.com/lli .

For more details on the features, performance, and availability of Synopsys' DesignWare M-PHY, please contact Synopsys. For more details on DesignWare MIPI IP, please visit http://www.synopsys.com/IP/InterfaceIP/MIPI/Pages/default.aspx .