Increased jitter performance allows for use across a wide range of frequencies

Silicon Labs (NASDAQ: SLAB) today announced the introduction of a new family of high-performance ^I²C programmable crystal oscillators (XOs) that deliver exceptional jitter performance and frequency flexibility.

The Si544/Si549 Ultra Series programmable XO family delivers typical jitter performance as low as 95 femtoseconds (fs), maximizing jitter margin for clocking high-speed 28 Gbps and 56 Gbps transceivers used in 100/200/400G communications and data center applications. The new devices can generate any frequency from 200 kHz to 1.5 GHz with 4 parts-per-trillion (ppt) resolution, enabling them to address a wide range of applications.

“As optical networks, hyperscale data centers, and mobile fronthaul/backhaul networks move to higher speeds, demand for ultra-low jitter timing solutions is growing,” said James Wilson, Senior Director of Marketing for Silicon Labs’ timing products. “By choosing Silicon Labs’ ^I²C configurable Si54x Ultra Series oscillators, system designers can maximize SNR margin, de-risk development and ensure first-time design success.” “These experiences will give designers a clear understanding that they are using a programmable XO product with the industry’s best frequency flexibility,” he said.

The Si544/Si549 XOs support four preset and pin-selectable startup frequencies. After power-up, the operating frequency of these devices can be easily changed via the ^I2C interface.

This flexible configuration allows this single oscillator to replace multiple single-, dual-, and quad-frequency XOs and multiplexer (mux) devices. The new devices can be powered by a single 1.8 V, 2.5 V, or 3.3 V input, eliminating the need to search for different part numbers for different input voltages. The Si54x XOs' I ² C interface supports update rates as fast as 1 MHz, enabling their use with a wide range of ASSPs, ASICs, SoCs, and FPGAs.

The Si544/Si549 XOs are available in 3.2 mm x 5 mm and 5 mm x 7 mm packages, providing superior frequency flexibility while maintaining the same footprint as standard fixed-frequency XOs. This footprint compatibility enables hardware designers to prototype with an ^I²C programmable XO and then easily migrate to a single-frequency XO when moving to production.

The Si54x XO is a product developed for 56Gbps transceiver product design. Products with this design utilize PAM4 (pulse-amplitude modulation) signaling for serial data transmission. PAM4 uses four-phase signaling to increase the bit rate per channel while maintaining bandwidth, but this inherently makes it more susceptible to noise. Using an ultra-low-jitter reference clock, such as the Si544/Si549, not only maximizes signal-to-noise ratio (SNR) margins, preventing bit errors and maintaining signal integrity.