Xilinx, Inc. (NASDAQ: XLNX) today announced the availability of the Virtex®-7 X690T FPGA, which combines the industry’s most reliable high-speed serial transceivers with the highest system bandwidth and market-optimized FPGA resources. The Virtex-7 X690T FPGA is the first device in the 7 series to address high-performance, advanced wired communications applications that require a low-power, single-solution solution. These devices enable fast, scalable, and easy-to-implement chip-to-chip serial interfaces and robust 10GBASE-KR backplanes that maximize bandwidth while supporting distances between diverse boards in next-generation communications systems. They also enable everything from high signal-integrity interfaces to the latest optical modules qualified to support cable distances up to 80 km. Customers requiring greater system capacity and bandwidth can simply migrate to the X1140T FPGA, built with Virtex-7 3D Stacked Silicon Interconnect technology on the 7 Series FPGA scalable optimized architecture. A footprint-compatible Virtex-7 X1140T FPGA with 96 GTH transceivers is expected to ship in May.

“Xilinx has many years of experience in serial transceivers, and to date, we have shipped 75% of all FPGAs that include serial transceivers,” said Tim Erjavec, senior director of FPGA platforms at Xilinx. “And by combining this with our innovative low-power 28nm 7-series FPGA architecture, we have created a product family that is highly optimized for the wired communications market,” he said. “Customers can now confidently implement their designs with the Virtex-7 X690T FPGA and then move up to larger FPGAs with market-optimized resource ratios when higher levels of integration are required.”

Next-Generation Devices Enabled by Virtex-7 X690T FPGAs
By 2015, global IP network data is expected to surpass the zettabyte threshold, representing a compound annual growth rate (CAGR) of 32% higher than in 2010. In particular, demand for IP-based video services is growing exponentially, driving the development of next-generation Layer 2 network switch equipment with the low latency and improved Quality of Service (QoS) performance required to meet this demand.
Equipment manufacturers serving cable operators are tasked with developing next-generation EdgeQAM equipment that is cost-effective, power-efficient, and capable of supporting full-spectrum switching digital video to deliver high-definition video on demand (VOD) directly to the home.

Ross Q. Smith, CEO of RADX Technologies, Inc. “As customers increasingly demand narrow-cast services from cable operators, equipment manufacturers are challenged to deliver solutions that can accommodate evolving and emerging standards,” said Mr. Smith. “The EdgeQAM solution being developed by Xilinx and RADX leverages the compatibility, flexibility and integration of the Virtex-7 X690T FPGA to significantly increase QAM channel density while staying within existing power envelopes.”

The Virtex-7 X690T and X1140T FPGAs deliver the highest throughput and bandwidth per watt of any FPGA, enabling advanced packet processing, FEC, QoS, switching, and traffic management algorithms, as well as next-generation EdgeQAM. Engineers can design with confidence using the industry's most advanced dynamic control GTH serial transceivers. These include a fully programmable 3-tap FIR, enabling transmitter de-emphasis to handle a wide variety of environments, and a fully adaptive 7 fixed and 4 sliding tap receiver Decision Feedback Equalization (DFE) circuit—the most DFE taps in the industry—to ensure maximum margin across different topologies. To accelerate design and debug, each GTH transceiver also includes non-destructive, high-resolution 2D eye scan circuitry, enabling designers to view and measure the receiver eye pattern within the FPGA. The Virtex-7 X690T FPGA, featuring 80 GTH transceivers running at up to 13.1 Gbps, is the first FPGA to break the 2 Tbps single FPGA device bandwidth barrier. The advanced 7 Series FPGA architecture built on the TSMC 28HPL processor enables customers to achieve total power savings of more than 25% over competing FPGAs with similar density, while achieving the integration required to build next-generation systems that meet performance and low-power requirements.