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Kuntek to distribute Imperas' RISC-V software development tool riscvOVPsim for free

Google 우선 소스Published2018.12.12 09:04
RISC-V, open-source open CPU architecture
riscvOVPsim, RISC-V CPU Core Design Verification
Available for personal, academic, and commercial use

Kuntek

On the 11th, Kuntek announced that it would distribute 'riscvOVPsim (RISC-V Open Virtual Platform Simulator),' a virtual machine that supports software development for 'RISC-V,' an open-source CPU from embedded software development company Imperas, to domestic developers free of charge.

RISC-V, an open-source based CPU for hardware development such as mobile devices, is a prime example of an open CPU architecture created by applying open source to hardware development. Development began at the University of California, Berkeley in 2010, and it was made available for free use under the Berkeley Open Source License. RISC-V is attracting attention as the most promising CPU architecture to replace the existing ARM.

Unlike ARM, there is no need to pay separate license or royalty fees, and even if you develop your own products, you do not have to disclose all of the source code. In addition, support for a wide range of operating systems is available, and easy support can be received from software vendors and tool developers.

Imperas riscvOVPsim

Imperas's riscvOVPsim (RISC-V Open Virtual Platform Simulator) is a virtual machine for embedded software development projects that runs in a RISC-V environment. riscvOVPsim is a RISC-V Instruction Set Simulator (ISS) that supports initial implementation testing and design verification of RISC-V CPU core designs.

riscvOVPsim is provided as open source and can be used for personal, academic, and commercial purposes. It is easy and simple to use as you can download the executable file and run it on standard Linux or Windows post-PC. It allows you to develop and debug code for RISC-V processors on x86-based PCs without the need for a separate platform. In addition, it provides a high-performance simulation environment capable of executing over 1 billion instructions per second on a host PC.

"RISCVOVPSIM is an easy-to-use and simple software development tool with no restrictions on commercial use, so it is expected to be of great help in pioneering the RISC-V market," said Bang Hyuk-jun, CEO of Kuntek. "We will be able to provide a suitable solution for those who need to develop RISC-V software, developers who want to build and test compliance in RISC-V CPU implementations, and developers who want to test regulatory compliance through RISC-V CPU implementations."

riscvOVPsim, which maintains and manages the license in Imperas and fully complies with the OVP open standard API, can be downloaded from GitHub (https://www.github.com/riscv/riscv-ovpsim).
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