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HSSL requires only 5 pins, resulting in lower cost
| High-speed communication between MCU and FPGA
| Starter kit including Zyron FMC board provided
Infineon Technologies AG announced today that it is collaborating with Xilinx and Xylon to increase flexibility when using safety MCUs in automotive and industrial applications. 
Infineon AURIX
The Xylon IP core, called logiHSSL, enables high-speed communication between Infineon AURIX TC2xx and TC3xx MCUs and Xilinx SoC, MPSoC, and FPGA devices via the Infineon High Speed Serial Link (HSSL). This serial link supports baud rates up to 320 Mbaud with a net payload data rate of up to 84%.
HSSL is an Infineon-specific interface that requires only five pins (two LVDS pins each, plus a clock pin), reducing costs. The HSSL interface can also be used to exchange data between AURIX devices and customer ASICs for performance or functionality expansion.
The new IP cores enable system developers to combine the safety and security provided by AURIX with the rich functionality offered by Xilinx devices. Devices connected in this way can access and control each other's internal resources or connected resources through HSSL.
“Infineon’s AURIX MCUs are the market standard for safety-critical applications such as ADAS and autonomous driving,” said Ralf Koedel, Director Marketing, Microcontrollers, Infineon.
“Infineon now offers customers a new option for advanced applications where both performance and safety are critical,” he continued. “This IP can also be used in industrial automation applications.”
“Xilinx’s products are widely used in ADAS and AD architectures for data aggregation, preprocessing, distribution, and compute acceleration,” said Paul Zoratti, director of automotive solutions at Xilinx. “Combined with the AURIX family, which provides ASIL D level functional safety, we are delivering a leading FPGA-based HSSL solution.”
“Using Xylon’s licensable IP cores, we can implement a reliable HSSL communication path between Xilinx and Infineon devices without wasting valuable development resources,” he continued.
To support development efforts related to this, Infineon offers a starter kit. This kit includes a Xilinx evaluation kit, an Infineon AURIX evaluation board, and a Xylon FMC board. The kit also includes a reference design (including test software applications), a Xylon logicBRICKS evaluation license, documentation, and technical support.
New IP cores and development kits will be available starting in March 2019.
| High-speed communication between MCU and FPGA
| Starter kit including Zyron FMC board provided
Infineon Technologies AG announced today that it is collaborating with Xilinx and Xylon to increase flexibility when using safety MCUs in automotive and industrial applications.

Infineon AURIX
The Xylon IP core, called logiHSSL, enables high-speed communication between Infineon AURIX TC2xx and TC3xx MCUs and Xilinx SoC, MPSoC, and FPGA devices via the Infineon High Speed Serial Link (HSSL). This serial link supports baud rates up to 320 Mbaud with a net payload data rate of up to 84%.
HSSL is an Infineon-specific interface that requires only five pins (two LVDS pins each, plus a clock pin), reducing costs. The HSSL interface can also be used to exchange data between AURIX devices and customer ASICs for performance or functionality expansion.
The new IP cores enable system developers to combine the safety and security provided by AURIX with the rich functionality offered by Xilinx devices. Devices connected in this way can access and control each other's internal resources or connected resources through HSSL.
“Infineon’s AURIX MCUs are the market standard for safety-critical applications such as ADAS and autonomous driving,” said Ralf Koedel, Director Marketing, Microcontrollers, Infineon.
“Infineon now offers customers a new option for advanced applications where both performance and safety are critical,” he continued. “This IP can also be used in industrial automation applications.”
“Xilinx’s products are widely used in ADAS and AD architectures for data aggregation, preprocessing, distribution, and compute acceleration,” said Paul Zoratti, director of automotive solutions at Xilinx. “Combined with the AURIX family, which provides ASIL D level functional safety, we are delivering a leading FPGA-based HSSL solution.”
“Using Xylon’s licensable IP cores, we can implement a reliable HSSL communication path between Xilinx and Infineon devices without wasting valuable development resources,” he continued.
To support development efforts related to this, Infineon offers a starter kit. This kit includes a Xilinx evaluation kit, an Infineon AURIX evaluation board, and a Xylon FMC board. The kit also includes a reference design (including test software applications), a Xylon logicBRICKS evaluation license, documentation, and technical support.
New IP cores and development kits will be available starting in March 2019.
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