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| Xilinx Samples 16GB Virtex UltraScale+ HBM FPGA… Mass Production Starting This Fall
When processing massive large-scale data sets, bandwidth affects processing speed at every stage. For data-intensive workloads such as security processing, big data analytics, database acceleration, and video transcoding, substantial HBM capacity is required to enhance performance.
Xilinx announced on the 24th that it has developed an HBM FPGA product supporting 16GB HBM.
The newly developed "16GB Virtex UltraScale+ HBM (High-Bandwidth Memory) FPGA" features memory bandwidth of 460GB/s, which is 20 times greater than DDR4 DIMM, while power consumption is at 75% level.
When developing the existing 4GB and 8GB Virtex UltraScale+ HBM FPGAs, Xilinx integrated HBM2 DRAM and FPGA logic within a single package to reduce latency and power consumption while improving performance.
The Virtex UltraScale+ HBM FPGA adopts a PCIe Gen4 x8 interface supporting the CCIX (Cache coherent interconnect for accelerators) protocol and provides 3.1Tb/s SerDes bandwidth to support up to 96 32.75Gb/s transceivers. It also reduces footprint by eliminating external package memory I/O.
Xilinx is currently supplying samples of the 16GB Virtex UltraScale+ HBM FPGA. Mass production will begin this fall.
When processing massive large-scale data sets, bandwidth affects processing speed at every stage. For data-intensive workloads such as security processing, big data analytics, database acceleration, and video transcoding, substantial HBM capacity is required to enhance performance.
▲Xilinx 16GB HBM FPGA Development
(Image=Xilinx)
(Image=Xilinx)
Xilinx announced on the 24th that it has developed an HBM FPGA product supporting 16GB HBM.
The newly developed "16GB Virtex UltraScale+ HBM (High-Bandwidth Memory) FPGA" features memory bandwidth of 460GB/s, which is 20 times greater than DDR4 DIMM, while power consumption is at 75% level.
When developing the existing 4GB and 8GB Virtex UltraScale+ HBM FPGAs, Xilinx integrated HBM2 DRAM and FPGA logic within a single package to reduce latency and power consumption while improving performance.
The Virtex UltraScale+ HBM FPGA adopts a PCIe Gen4 x8 interface supporting the CCIX (Cache coherent interconnect for accelerators) protocol and provides 3.1Tb/s SerDes bandwidth to support up to 96 32.75Gb/s transceivers. It also reduces footprint by eliminating external package memory I/O.
Xilinx is currently supplying samples of the 16GB Virtex UltraScale+ HBM FPGA. Mass production will begin this fall.
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