Microchip Launches ZL3073x/63x/64x Platforms
Integrated into a single-chip low-power device, improving performance
Supported via Microchip IEEE 1588 PTP, etc.


For 5G implementation, timing sources must be synchronized across the entire packet-switched network with 10 times greater accuracy than LTE requirements. Microchip announced on the 30th that it has released a single-chip low-power multi-channel IC equipped with its IEEE® 1588 Precision Time Protocol (PTP) and clock recovery algorithm software module to support 5G implementation.

“The Microchip ZL3073x/63x/64x network synchronization platform reduces network equipment timing errors to meet stringent 5G requirements through sophisticated measurement, calibration, and tuning capabilities,” said Rami Kanama, Vice President of Timing and Communications at Microchip. “The architecture and low-jitter synthesizer that enable the required channel density simplify the design of timing cards, line cards, radio units (RUs), centralized units (CUs), and distributed units (DUs) for 5G radio access networks (RANs).”

Microchip's measurement, calibration, and tuning capabilities enable 5G systems to meet ITU-T G.8273.2 Class C (maximum absolute timing error: 30ns) and Class D (maximum absolute timing error limit: 5ns) timing error requirements. The architecture provides up to five independent Digital Phase-Locked Loop (DPLL) channels. Reduces board space, power, and system complexity with a small 9 × 9mm package that consumes only 0.9W of power.

The network synchronization platform software includes the ZLS30730 high-performance algorithm coupled with Microchip's ZLS30390 IEEE 1588-2008 protocol engine. These have all been widely deployed in 3G, 4G, and 5G networks with precision timing capabilities.

The ZL3073x/63x/64x network synchronization platform, combined with Microchip’s precision 5G oscillator family, including the OX-601 oven-controlled crystal oscillator (OCXO), provides total system solutions to 5G network operators. The Ethernet physical layer (PHY) device family complements Microchip’s timing and clock solution portfolio, which includes clock generation, fan-out buffers, jitter attenuation solutions, and quartz and MEMS oscillators.

Microchip provides a graphical user interface (GUI) and evaluation boards, along with application notes and other design support tools. The ZL3073x/63x/64x network synchronization platforms are currently available for mass production and are supplied with IEEE 1588 PTP and algorithm software modules. These modules are provided under a download license.