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[Series] ST Yuji Engineer Kawano ⑫ - Timers, 'Pulse' Control via 'Clock' Calculation

Google 우선 소스Published2022.02.08 11:13
Timer, 'pulse' control through 'clock' calculation

There is no direct correlation between input/output pulse control and clock calculation in the acquire/compare block.
Repeated pulse output at a fixed period, user can freely change High/Low pulse width

[Editor's Note] Generally, when people think of semiconductors, they tend to picture components familiar to the general public, such as computer CPUs and memory. On the other hand, the Micro Controller Unit (MCU), which serves as a core semiconductor for driving electronic products, is used in virtually every electronic device we encounter, yet remains an unfamiliar semiconductor to the general public. Recently, however, MCUs have begun to attract public attention as they have been frequently mentioned in the media due to the semiconductor shortage. Accordingly, this publication has organized a series of articles by Manager Yuji Kawano of STMicroelectronics, a company specializing in MCU semiconductors, to provide a professional look into MCUs.

■ Various types of MCUs use special timer functions

Like kitchen timers, electronic circuit timers also display the amount of time elapsed. However, they do not measure only the time period. The function of timers currently most commonly used is to output pulses within a predetermined cycle and measure the input pulse frequency. Currently, various types of MCUs utilize specialized timer functions, and consequently, these diverse types of MCUs are being used for various purposes. This paper explains basic timer functions using the STM32F series MCU, a general-purpose MCU produced by STMicroelectronics (hereinafter ST), as an example.

■ Input or output passing through the external CH1 terminal that operates as an input or output terminal depending on the pulse or timer function.

Figure 1 is a block diagram of a 16-bit timer. A 16-bit counter counts clock pulses (up to 65,536 times). An external or internal clock can be selected using a trigger/clock controller. A prescaler, also known as a frequency divider, controls the counting cycle by dividing the clock frequency.

This 16-bit prescaler can divide the frequency up to 65,536 times. The auto-reload register (ARR) holds a user-selected calculated value. The capture/compare block controls the input and output pulses, but it is not directly related to the clock calculation function. In this example, the timer uses the internal capture/compare register (CCR) to control the input and output pulses. A pulse is an input or output passing through the external CH1 terminal, which operates as an input or output terminal depending on the function performed by the timer.



▲Figure 1: Block diagram and counter function



■ Interrupt signal CPU transmission timing determined by ARR value

This is the most basic of the various timer functions. When a clock pulse is input, the counter counts up or counts down by adding or subtracting one. Then, the timer calculates the time period by multiplying the counter output number by the clock pulse period, which is already known.

The up counter has a function called count-up mode, and the counter value starts at 0 and increases sequentially by one until it reaches the ARR value. When the ARR value is reached, the counter stops and sends an interrupt signal to the CPU to inform it that a specified time has elapsed.

Conversely, the down counter has a count-down mode function, and the counter value starts at the ARR value and decreases sequentially one by one until the value reaches 0. When it reaches 0, the counter stops and sends an interrupt signal to the CPU.

In both modes, the timing of sending the interrupt signal to the CPU is determined by the ARR value.

■ Timer External Input: Transmits counter value to CCR upon detection of new rising or falling edge.

When the timer detects a rising or falling edge (or both) in the external input signal, it transmits the counter value to the CCR. An example of this function, called 'input acquisition', is shown in Figure 2. In particular, in this case, the timer detects the rising edge (i.e., transition from Low to High) of the input signal through the external CH1 terminal. Since the counter value is 4 at the first rising edge, the CCR acquires the value 4, and the CPU stores this in memory (i.e., RAM). The counter value at the next rising edge is 11. The CCR also acquires this value, and the CPU stores this again in memory. Next, the CPU subtracts the first acquired value (4) from the second acquired value (11) and determines from this that the input signal period matches 7 clock cycles. Since the clock pulse period is known, the CPU performs multiplication to obtain the actual input signal period.



▲Figure 2: Input capture function



Even when a falling edge (i.e., transition from High to Low) is detected, the timer acquires the input signal cycle in a similar manner. The timer can also obtain the counter value at both the rising and falling edges to obtain the length of each High level and Low level.

■ Output event signal when the output comparison counter value (CCR) is reached

The output compare function outputs an event signal when the counter value reaches a user-set CCR value. On the other hand, the pulse width modulation (PWM) function changes the ratio between the High output pulse width and the Low output pulse width. Since these functions use the same operating principle, both are explained in this section using Figure 3.



▲Figure 3: Output comparison and PWM function



The output comparison function outputs an event signal through the external CH1 terminal when the counter value is equal to the CCR value. The event indicates a change in the signal. For example, the signal toggles or changes from Low to High or High to Low. In the case of Figure 3, case (1) represents a toggling signal. If the preceding signal was at a Low level, it changes to a High level, and if it was at a High level, it changes to a Low level. Case (2) represents a signal changing to a High level, and case (3) represents a signal changing to a Low level. In cases (2) and (3), the signal changes regardless of the previous signal level. The output comparison function affects the frequency of event occurrences because it determines the counter reset cycle using the ARR value.

Case (4) illustrates a PWM function and includes only toggling events. When the CCR value becomes equal to the counter value, the output signal is toggled. When the counter value reaches the ARR value, the counter and the output signal are reset simultaneously. In the case of Case (4), the output signal returns to a Low level.

Here, the CCR value is set to 4 to toggle the signal. Conversely, if the value is set to 2, the signal toggles faster, allowing adjustment of the ratio between the High output pulse width and the Low output pulse width. However, if the ARR value is constant, the output pulse period does not change. The timer repeats this procedure to output pulses at a constant period, and the user can freely change the ratio between the High output pulse width and the Low output pulse width. In addition, the starting value for the pulse can be selected as High or Low.

PWM functions are used in applications such as motor speed control (using pulse periods or the ratio of high and low widths) and LED lamp intensity adjustment (high levels turn on the lamp, while low levels turn off the lamp under high frequency conditions).

Although the operation method of the up counter was explained in Figure 3, the down counter also operates in a similar way. The timer starts at the ARR value and counts down until the counter value reaches the CCR value, at which an event signal is generated.

■ In addition to encoder functions, it also provides other features such as single pulse output.

The STM32F series timers provide not only an encoder function that switches between count-down or count-up modes based on a specified signal, but also other functions, such as a function to output a single pulse (instead of generating a series of pulses).
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