IAR Systems®, a global provider of embedded development software tools and services, is offering high-performance, established technology for companies adopting new RISC-V 64-bit cores for future development projects.

IAR announced on the 15th that it supports 64-bit RISC-V cores in IAR Embedded Workbench® for RISC-V, a specialized development tool chain for RISC-V.

IAR Embedded Workbench for RISC-V is a complete C/C++ compiler and debugger toolchain that integrates everything embedded developers need into a single IDE.

By leveraging IAR Embedded Workbench for RISC-V, which provides outstanding optimization techniques, developers can ensure that their applications meet their requirements and maximize the utilization of embedded memory.

IAR Embedded Workbench for RISC-V version 3.10 supports a variety of RV64 RISC-V cores, including several RV64 devices from Andes, Codasip, Microchip, Nuclei, and SiFive.

It also supports symmetric multi-core processing (SMP), enabling high-performance debugging of multi-core RISC-V devices.

IAR Systems' “64-bit support is a monumental achievement for our investment in RISC-V technology and the ecosystem,” said Anders Holmberg, CTO. “As adoption and interest in RISC-V technology continues to grow, particularly in the Asia Pacific region, we are committed to leading the way in providing specialized development solutions for building high-quality embedded applications across all industries.”