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[Serial] ST Yuji Kawano Engineer (18) - How to handle unused GPIO?

Google 우선 소스Published2022.06.14 12:14
Unused GPIO terminals are handled differently depending on the internal structure.

Noise error and latch-up occur, input buffer protection is required.
Microampere-level currents are unlikely to damage the MCU.

[Editor's Note] When people think of semiconductors, they usually think of familiar semiconductors like computer CPUs and memory. Conversely, MCUs (Micro Controller Units), the core semiconductors that power electronic devices, are widely used in virtually every electronic device we encounter, yet they remain relatively unfamiliar to the general public. Recently, MCUs have been making headlines due to the semiconductor shortage, drawing public attention. Therefore, this magazine has prepared a series of articles by Yuji Kawano, Manager at STMicroelectronics, a company specializing in MCU semiconductors, to provide an in-depth look at MCUs.

■ Question

How can I handle unused GPIO (general purpose I/O) terminals?

■ Answer

Unused GPIO terminals must be handled differently depending on their internal structure. Typically, the voltage of each terminal is fixed to a constant value to prevent fluctuations due to noise. If you leave unused GPIO pins open by setting them to high impedance, in theory this will not affect MCU performance.

However, external noise can cause MCU errors or latch-up, leading to MCU failure. Therefore, it is recommended to maintain a constant voltage using a pull-up or pull-down resistor of 10 to 100 kΩ (Figure 1(a)).

Some GPIOs have built-in pull-up or pull-down resistors. Using these resistors can reduce the number of external components (Figure 1(b)). While the output can be made "high" or "low" based on the GPIO voltage (Figure 1(c)), the use of resistors is recommended instead, as the terminals can accidentally contact the power supply, allowing large currents to pass through, potentially damaging the MCU.

Typically, the user manual will explain how to handle these terminals. If not, consult your MCU manufacturer.



▲Figure 1: Example of unused GPIO handling method



■ GPIO terminal structure

Let's explain the general GPIO structure. Figure 2(a) contains a logic diagram. Pull-up and pull-down resistors can be turned on or off via software, but some GPIOs do not have such resistors. Input and output buffers are directly connected to the input and output terminals. Protection diodes protect the terminals from static electricity and are completely independent of MCU logic operations.

The input buffer structure varies depending on the MCU or GPIO. For details, please refer to the user manual. Figure 2(b) shows six common input buffers, which can be broadly categorized into two types. The through-buffer type always passes input data, while the AND or OR type passes input data only when a lead signal is present. Each type can be further categorized into two types based on whether it exhibits the Schmitt characteristic.

The output buffer is typically a CMOS push-pull type. Each PMOS and NMOS within the CMOS structure is independently turned on and off, implementing three states: high output, low output, and high impedance. When the GPIO is not in use, the pull-up and pull-down resistors are disconnected, putting the output buffer in a high-impedance state. This state does not read input data and has no effect on MCU logic operation.

However, this results in an unstable terminal voltage level because the GPIO terminal is not driving anything. This means the voltage level becomes vulnerable to external influences. In this state, if external noise causes abrupt voltage changes that are then transmitted to the MCU, this can result in operational errors or latch-up, potentially leading to MCU failure. Because it is difficult to represent changes in terminal voltage, such as noise, in a logic diagram, a CMOS cross-sectional diagram is provided for reference.



▲Figure 2: GPIO structure



■ Inflow noise path

Figure 3 shows an example of a CMOS cross-sectional structure. This is a simplified representation of an input buffer. The signal input to this buffer is provided to the PMOS and NMOS gates. The NMOS gate and the P-WELL have an oxide film between them, forming a capacitor, as do the PMOS gate and the N-SUB. This capacitor is called a gate oxide capacitor. Capacitors tend to pass high frequencies. Since noise is generally composed of high-frequency components, even when the gate is logically closed, noise can penetrate deep into the MCU by passing through parasitic capacitors (e.g., the gate thin-film capacitor).

When noise penetrates the MCU and reaches WELL or SUB, an MCU operation error or latch-up occurs. Therefore, the input buffer must be protected from noise.



▲Figure 3: CMOS cross-sectional structure



■ Noise bypassing

To prevent noise from penetrating the MCU, the voltage of the GPIO terminals is stabilized by fixing the voltage to a certain level. Even if noise occurs, fluctuations are minimized by fixing the voltage of the power or ground terminals. Furthermore, noise can bypass the MCU and travel to the power or ground without entering the MCU.

The simplest and most effective way to fix the voltage of a GPIO pin is shown in Figure 1. Figure 4 shows cases where noise has entered Figures 1(a), (b), and (c). In Figures 4(a) and (b), the GPIO pin voltage can be fixed using a pull-up or pull-down resistor, but since it is adjusted to the power or ground level, it is not affected by the incoming noise. In fact, a large amount of noise goes to the power or ground instead of bypassing the MCU and penetrating it.

Clearly, fixing the GPIO terminal voltage or bypassing noise through a resistor is less effective than using a 0-resistance resistor. Therefore, in this figure, Figure 4(c) is the most effective configuration for blocking incoming noise. However, if high-voltage noise occurs and persists for a significant period of time, a large current will flow through the MCU or power supply. Such large currents can damage the circuit and must be prevented. The use of a resistor is recommended. By placing a resistor in the path through which noise flows, sudden voltage fluctuations caused by noise can be reduced.

The resistance value of the resistor is not standardized and can be selected according to the user's system environment. Typically, a resistance of 10 to 100 kΩ is used. For example, if the terminal short-circuits a 2 V power supply, a current of 10 μA (= 3 V/100 kΩ) will pass through 100 kΩ, and a current of 100 μA (= 3 V/10 kΩ) will pass through 10 kΩ.

In no case will microampere-level currents damage the MCU. A resistor with a higher resistance value (e.g., 1 MΩ) can be used, but its pulling performance is weaker, resulting in a relatively low noise resistance.



▲Figure 4: Example of unused GPIO handling method
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