The semiconductor industry is currently entering a golden age that requires a shift in mindset from the traditional foundry model to the system foundry model. Intel's system foundry model goes beyond supporting traditional wafer manufacturing to provide systems-in-package that integrate advanced packaging, an open chiplet ecosystem, and software components, focusing on the needs of users demanding powerful computing capabilities and immersive digital experiences.

Intel announced on the 24th at the semiconductor industry academic event 'Hot Chips 34' that it will unveil innovations in the latest architecture and packaging that enable 2.5D and 3D tile-based chip designs capable of continuing Moore's Law and ushering in a new era of semiconductor manufacturing.

Intel CEO Pat Gelsinger delivered the keynote speech as the second Intel CEO since Gordon Moore's keynote speech in 1995. Through this keynote speech, Intel unveiled its roadmap for pursuing more powerful computing, including announcing details on its entire future portfolio, such as Meteor Lake, Ponte Vecchio GPU, Intel® Xeon® D-2700 and 1700, and FPGAs, and presenting a new system foundry model.

Intel's data center GPU, codenamed Ponte Vecchio, was built to address computing density across high-performance computing (HPC) and AI supercomputing workloads. It also fully leverages Intel's open software model, which uses OneAPI to simplify API abstraction and programming between architectures. Ponte Vecchio consists of multiple complex designs appearing as connected tiles, utilizing a combination of EMIB (Embedded Multi-Die Interconnect Bridge) and Foveros advanced packaging technologies. High-speed MDFI interconnects allow packages to scale up to two stacks, enabling the integration of over 100 billion transistors in a single package.

The Xeon D-2700 and 1700 series are designed for use at the edge of 5G, IoT, enterprise, and cloud applications, and are designed to address the challenges of power and space constraints frequently encountered in real-world usage environments. They support the latest computing cores, 100G Ethernet with flexible packet processors, inline encryption acceleration, Time Coordinated Computing (TCC), Time-Sensitive Networking (TSN), and built-in optimization for AI processing.

FPGA technology is a tool for radio frequency (RF) applications and hardware acceleration. Intel has demonstrated new efficiencies by integrating digital and analog chiplets, as well as chiplets from various process nodes and foundries, to reduce development time and maximize flexibility for developers, and plans to share the results of its chiplet-based approach.

Intel CEO Pat Gelsinger stated, “Intel is developing technologies based on various advanced technologies, including RibbonFET, PowerVia, High NA lithography, and 2.5D and 3D packaging, with the goal of increasing transistor density per package from the current 100 billion to 1 trillion by 2030.” He added, “For engineers, there has never been a better and more important era.” He emphasized, “We must all actively support semiconductors so that they can play a vital role in our lives today.”

With technological competition intensifying recently, technology is rapidly changing the way people experience the world. As innovative technologies such as computing, connectivity, infrastructure, and AI—which are ubiquitous—converge and strengthen, Intel stated, "We will continue to create new possibilities by presenting the future of technology and supporting humanity in achieving new levels of goals."