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Xilinx Expands User Base with SDSoC Development Environment for All-Programmable SoCs and MPSoCs

Google 우선 소스Published2015.04.07 09:49

Xilinx announced that it is providing the SDSoC development environment for its All-Programmable SoCs and MPSoCs . The SDSoC development environment is the third generation of the Xilinx SDx development environment family and enables embedded software developers to leverage a broader community to enhance the hardware and software strengths of ' All-Programmable ' devices .  

Even developers who have never used FPGAs before can now rapidly configure entire smart vision systems and write and develop prototypes using a familiar C/C++ based workflow . "By combining these elements, any design team can now fully leverage the strengths and potential of All-Programmable SoCs and MPSoCs , " says Xilinx .  

Xilinx's Zynq-7000 All Programmable SoC and Zynq UltraScale+ MPSoC can increase system performance, lower system power, and even reduce BOM costs .

The SDSoC development environment enables embedded software developers to accelerate the development of smarter systems by utilizing Zynq All-Programmable SoCs and MPSoCs .  

SDSoC provides an ASSP -like programming environment by including an easy-to-use Eclipse Integrated Development Environment (IDE) and a comprehensive development platform for heterogeneous Zynq All-Programmable SoC and MPSoC implementations . It also includes the industry's first full-system C/C++ compiler, enabling system-level profiling , software acceleration using programmable logic, and automatic generation of system connectivity . It also provides libraries to shorten programming . It enables end users and third-party platform developers to rapidly define , integrate, and verify system-level solutions , and provides a customized programming environment for their end customers.  

Xilinx SDSoC Development Environment

To leverage the strengths of Zynq SoC and MPSoC Required RTL (VHDL or Verilog): windowtext;"> Lack of development expertise or hardware resources The small development teams have been having difficulties with development. I have gone through it . Xilinx 's New C/C++ SDSoC , a development environment , solves this problem and allows more development teams to It supports the use of Zynq devices .  

The SDSoC development environment for Zynq SoC and MPSoC in two ways development speed It brings it forward . First , software developers use Xilinx , Third party By utilizing the end - user's platform, work can be started faster than the existing hardware / software development flow . Second , SDSoC software accelerator/span> is programmable logic It eliminates the need for frequent exchanges between the hardware and software teams required for utilization, thereby increasing the overall system development speed . In other words , while the existing approach of implementing hardware-centric and software-centric flows separately could delay development and cause uncertainty regarding system architecture and performance,SDSoC is configured to enable software acceleration with faster system profiling and programmable logic within a familiar embedded developer framework .  

 

System-level profiling and software acceleration : Advanced software profiling-based SDSoC is system-level By adding profiling optimalSystem ( Hardware and Software ) Rapidly predict performance and evaluate the entire system Performance and power can be optimized .  

The user" With SDSoC , you can identify software function bottlenecks and find the most time-consuming functions that is, candidates for hardware acceleration," explained Hugh Durdan, Vice President of Portfolio and Solutions Marketing at Xilinx . This uses performance counters provided by the ARM CPU , and AXI performancean> Hardware performance by automatically inserting the Monitor (APM) into programmable logic It is carried out by collecting data . Running on this platform The software collects performance data , and the SDSoC uses this data Performance bottlenecks in the system Find the place where the phenomenon occurs . like this Weeks of progress in the development process through rapid performance feedback Meeting system-level performance and power requirements while reducing time Optimal code splitting is possible . Software developers By utilizing a platform-based performance prediction flow, time-consumingolor: windowtext;">Actual hardware creation Software without Performance prediction when moving functions to hardware for acceleration Get results within minutes It is possible .  

Users through simple GUI optionsAccelerate a feature ( function ) in programmable logic You can specify whether it is , and SDSoC generates C/C++ code to report software cycles and can quickly predict not only data transfer but also overall application acceleration , hardware resource utilization, etc.  

ASSPProgramming experience similar to "color: windowtext;"> : SDSoC provides the Eclipse IDE and can run C/C++ on bare metal or operating systems such as Linux or FreeRTOS . In addition, legacy HDL IP blocks can be reused as C callable libraries , and a complete heterogeneous multiprocessing system can be created .  

Whole-system optimization compiler : SDSoC includes ARM- based processing systems and programmable logic It has a built-in full-system optimization compiler designed for easy execution on target platform boards ."It generates all necessary hardware and software components . SDSoC allows you to select hardware-optimized libraries from Xilinx and third parties to fully leverage the high-performance, low-power acceleration of programmable logic ," explained Jung Woong, a manager at Xilinx Korea . "Although these libraries exist in software , they are already optimized to make hardware implementation easy ."  

Expert Usage Model for Platform Developers : SDSoC provides an expert usage model for system designers and platform developers . In addition, through a combination with Xilinx 's Vivado Design Suite, application -specific You can create a platform .  

SDSoC stated, " Over 30 customers are already using the initial evaluation version , and 6"A full-scale launch is scheduled to take place around the time of the month , " said Ahn Heung-sik, General Manager of Xilinx Korea .

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