With the spread of artificial intelligence (AI) and intensifying competition in advanced semiconductors, securing next-generation semiconductor technology has emerged as a key task for national competitiveness. In this context, the government has established a venue for exchange to share research achievements in the semiconductor field and expand cooperation among industry, academia, and research institutes. The purpose is to link research and development achievements with the demands of the industrial field to translate them into tangible technological competitiveness.

The Ministry of Science and ICT held the '2026 Semiconductor Business Performance Exchange Meeting' at the Paradise Hotel in Busan from the 13th to the 14th.

This event, hosted by the Ministry of Science and ICT and organized by the Next Generation Intelligent Semiconductor Project Group, the National Research Foundation of Korea, and 12 other institutions, is the third of its kind this year to share achievements in semiconductor research and development, workforce training, and international cooperation supported by the Ministry of Science and ICT.

Approximately 800 people attended the event, including 125 research project leaders and officials from semiconductor-related companies and institutions.

In his opening remarks, Lee Kang-woo, Director of the Original Technology Division at the Ministry of Science and ICT, said, “As the global competition for semiconductor technology leadership intensifies, every single research project is a core asset that will determine our country’s future,” and added, “I ask researchers and the industry to pool their capabilities together so that shared research results can lead to new technologies that lead the global market.”


In his subsequent welcoming remarks, Kim Hyung-joon, Head of the Next-Generation Intelligent Semiconductor Business Group, assessed, “Over the past year since last year’s performance report meeting, technological advancements and collaboration among industry, academia, and government have been achieved in various fields, including materials, devices, processes, and design.”

In addition, stating that “it is difficult to secure an advantage in global technology competition solely through the success of individual projects,” “Innovative K-semiconductors can be completed only when research results are organically connected from materials to devices and systems,” he stated, adding, “I will strive to ensure that achievements and feedback from the field are reflected in the formulation of national semiconductor R&D policies.”


On the first day of the event, Soyoung Jung, CEO of NVIDIA Korea, delivered a keynote speech announcing industrial changes related to the 'AI Factory' and the future direction of semiconductor technology development.

CEO Jung So-young described AI not as a simple technology, but as a new industry combining energy, semiconductors, infrastructure, AI models, and applications.

In particular, it was emphasized that data centers are evolving beyond simple cost centers into 'AI factories,' becoming a core infrastructure that creates new value.

It was also stated that computing demand is skyrocketing due to the proliferation of large-scale AI models and inference/agent AI, and that the importance of CPU, memory, and network technologies, as well as GPUs, is growing.

Furthermore, it was predicted that 'Physical AI,' encompassing robots, autonomous driving, and smart factories, will become a next-generation growth sector, and that Korea, equipped with competitiveness in manufacturing, semiconductors, and IT, can play a significant role in the global AI ecosystem.

In addition, in the specialized session, semiconductor design and infrastructureResearch achievements and future directions in fields such as advanced packaging, nanomaterials, and compound semiconductors were shared.

In particular, expert consulting in the fields of new devices and advanced packaging was also conducted to respond to the proliferation of High Bandwidth Memory (HBM) and the increasing demand for advanced packaging.

At the semiconductor achievement exhibition held as a side event, 13 major research achievements were displayed, including Professor Woo-Young Choi's 'CMOS-NEM Embedded Security Edge Artificial Intelligence System' from Seoul National University and Professor Min-Ju Kim's 'Room Temperature 3D Heterojunction Technology for Implementation and Verification of Memory-in-Sensor Computing' from Dankook University.

Looking at some of these, the first field to note is advanced packaging.

The 'Development of Microsubstrates for Next-Generation 2.1D Semiconductor Packages' project, led by Simtek, responds to the trend where the focus of semiconductor performance improvement is shifting from internal chip miniaturization to packaging technology.

The project aims to realize a vertically stacked microsubstrate with a line width and space of 2㎛/2㎛.

According to the poster, while the circuit width of existing substrates is at the 8–12㎛ level, 2.1D technology aims for miniaturization to a level of 1㎛ or less, and the goal is also to reduce the via size from 36㎛ to 2㎛ or less.

To this end, core technologies such as microcircuit formation, photosensitive materials, copper (Cu) planarization, and microvia processes are being developed in parallel.

In the field of heterogeneous integration, Professor Min-ju Kim's room-temperature 3D hybrid bonding technology at Dankook University is drawing attention.

The research team is developing a technology to bond chips at low temperatures of 40 to 80°C using a polymer-based diffusion barrier fabricated by the iCVD process.

Unlike conventional methods, it is characterized by the fact that it does not require plasma treatment and can reduce copper diffusion problems.

The research team applied this to the implementation of a Memory-in-Sensor structure, directly combining the image sensor and memory, and even demonstrated on-device noise removal capabilities.

In the field of devices, 3D synaptic memory technology being jointly developed by Ewha Womans University and Sungkyunkwan University was introduced.

The research team implemented artificial intelligence synapse functions by utilizing the threshold voltage change phenomenon caused by trap charges, which was previously identified as a problem in NAND flash memory.

It amounts to converting defect characteristics that were targeted for elimination into the core functions of the learning memory.

The research team is proceeding with development with the goal of more than 32 levels of weight representation, more than 1 million program-erase durability, and more than 20 years of data retention characteristics.

Research in the systems field led by Professor Wooyoung Choi of Seoul National University focuses on simultaneously solving computation and security issues.


This project addresses the power consumption problem of existing Compute-in-Memory (CIM) by implementing a Time-domain CIM.While improving the system, it also implements security features by combining a Physical Unclonable Function (PUF) based on nanoelectromechanical (NEM) devices.

The research team stated that they aim to develop a 1000 TOPS/W class CIM accelerator with embedded security and have significantly reduced area and read energy through a NEM-PUF structure.

Occupying a unique position at this exhibition was the National Nanotechnology Center's MPW (Multi-Project Wafer)-based scale-up platform.

The purpose of this project is to establish a shared infrastructure that connects AI semiconductor technologies developed at the university and research institute levels to actual manufacturing processes.

It takes on the role of verifying the commercialization potential of research results by providing a specialized MPW platform capable of integrating CMOS-based circuits and next-generation memory devices in stages.

The research unveiled this time covers different fields, but overall, it constitutes the core value chain of AI semiconductors.

It is assessed that a technological foundation for securing domestic AI semiconductor competitiveness is being established as device development, system implementation, 3D integration, advanced packaging, and manufacturing verification infrastructure are connected in a single flow.