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Xilinx Announces Early Access Support for Vivado Design Suite for 16nm UltraScale+ Portfolio

Google 우선 소스Published2015.07.29 14:09
Xilinx Korea (Country Manager Heung-Sik Ahn) July 24, 2015 – Xilinx announced support for early access to the Vivado Design Suite for the 16nm UltraScale™+ portfolio, including Zynq® UltraScale+ and Kintex® UltraScale+ devices. This Vivado tool early access release is optimized for UltraScale+ ASIC class programmable logic to leverage the full benefits of UltraScale+ devices and comes with the complete catalog of SmartCORE™ and LogiCORE™ IP.

In addition, software development for the Zynq UltraScale+ MPSoC family is possible using the Xilinx Software Development Kit (SDK) and PetaLinux tools. The Xilinx SDK provides a comprehensive Eclipse-based environment for developing or debugging software applications on MPSoC processor subsystems. Software teams can begin development immediately using Xilinx's robust and scalable QEMU emulation platform.

Usage period
For more information on the Vivado Design Suite Early Access tool for UltraScale+ portfolios, you can contact an official distributor. More detailed information about Xilinx software development environments and embedded platforms can be found in the Xilinx Software Developer Zone.

Xilinx UltraScale+ Portfolio
The FPGA's 16nm UltraScale+™ product family, along with 3D ICs and MPSoCs, combines new memory, 3D-on-3D, and Multi-Processing SoC (MPSoC) technologies to elevate performance and integration to a new level, while implementing SmartConnect interconnect optimization technology. System-level optimized UltraScale+ delivers 2 to 5 times higher system-level performance per watt than 28nm devices, guarantees the highest levels of system integration, intelligence, security, and safety, and provides value that goes beyond traditional process node migration.
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