Launch of DDR3T IP subsystem

Toshiba Corporation's Storage/Device Solutions Company announced the launch of PCI Express and DDR3 SDRAM IP subsystems.

These products were co-developed with Northwest Logic, a leading provider of high-performance, easy-to-use, silicon-proven PCI Express and memory interface IP cores. These subsystems are available for use in custom LSI platforms, including ASICs and FFSATM*4.

PCI Express cores include standard-compliant, full-featured PCI Express 3.0/2.1/1.1 cores and high-performance, scatter-gather DMA cores and drivers (Linux & Windows). The DDR3 SDRAM Controller Core provides high-bandwidth support with additional core full options including ARM AMBA AXI, multiport, reordering, ECC, and memory test support.



“We are pleased to be working with Toshiba to finalize the PCI Express and DDR3 SDRAM controller + PHY IP subsystem for Toshiba’s FFSA™ and ASIC platforms,” said Brian Daellenbach, CEO of Northwest Logic. “These pre-verified IP subsystems enable chip designers to quickly complete high-performance, complex SOC designs,” he said.

“By combining the IP and expertise of our two companies, we are poised to provide our customers with robust, value-added IP subsystem solutions and expert support to help them get products to market quickly,” said Yukihiro Urakawa, Toshiba’s senior vice president of technology.

Toshiba leverages its comprehensive expertise, from design to manufacturing, to offer a wide range of custom LSI solutions. FFSATM is an innovative and flexible custom LSI solution featuring a pre-designed master that provides configurable I/Os, SerDes, SRAM, and logic devices, all of which can be pre-configured to meet customer requirements.

Toshiba will continue to provide solutions that help customers optimize system design and achieve timely product development.