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Xilinx Expands SDSoC Development Environment to Boost Productivity

Google 우선 소스Published2016.06.17 15:58
Software - defined programmability of 16nm Zynq UltraScale + MPSoC
Leverage system -level profiling tools and accelerate C/C++ -based programming .


Xilinx announced the 2016.1 release of its SDSoC™ development environment, enabling software-defined programming for its Zynq family of SoCs and multiprocessing (MP) SoCs using the C/C++ language.

This new release also includes support for the recently announced 16nm Zynq UltraScale+™ MPSoC. It also cuts compilation times in half and significantly increases productivity through system-level profiling tools.

“We have seen significant growth in the number of users of this SDSoC development environment, with over 650, many of whom are designing Zynq SoC-based products, significantly reducing time to market,” said Nick Ni, senior manager of SDSoC product marketing and planning at Xilinx. He added, “It also significantly reduces edit time and system-level performance time with Zynq UltraScale+ MPSoC support.”

System and embedded software engineers can easily program Zynq UltraScale+ MPSoC devices using the SDSoC development environment. SDSoC automates the acceleration of C/C++ functions from the ARM application processing unit into the FPGA fabric by generating custom hardware IP using high-level synthesis (HLS), hardware connectivity, software drivers, and application executables with a single click of a button.

Unlike traditional siloed embedded software and hardware development processes, which often result in development delays and uncertain system architecture and performance, SDSoC enables rapid system profiling and architecture exploration within the familiar Eclipse IDE framework. This release also enables real-time, system-level identification of performance bottlenecks using hardware and software event tracing monitors.
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