| Low-power form factor system edge intelligence support
| Responding to the growing demand for high-speed imaging solutions
| Smart Embedded Vision Initiative

As compute-intensive, vision-based systems are integrated at the network edge, field programmable gate arrays (FPGAs) are emerging as a flexible platform for next-generation designs.

These intelligent systems require high bandwidth processing capabilities and are deployed in small form factors with demanding thermal and power constraints.

Microchip Technology Inc., through its Microsemi subsidiary, today announced the Smart Embedded Vision initiative, which provides solutions for designing intelligent machine vision systems using Microchip’s low-power PolarFire FPGAs to help developers accelerate designs.

Microchip has expanded its family of high-resolution smart embedded vision FPGAs with a new, enhanced high-speed imaging interface, a bundle of intellectual property (IP) for image processing and an expanded partner ecosystem.

The Smart Embedded Vision Initiative is a FPGA-based solution that includes IP, hardware and tools for low-power, small-form-factor machine vision designs in the industrial, medical, broadcast, automotive, aerospace and defense markets. Provides a range of products.

With the launch of the initiative, Microchip has added the following elements to address the design requirements of intelligent vision systems:

SDI (Serial Digital Interface) IP is used to transmit uncompressed video data streams over coaxial cables, and the interface is provided at various speeds such as HD-SDI (1.485 Gbps, 720p, 1080i), 3G-SDI (2.970 Gbps, 1080p60), 6G-SDI (5.94 Gbps, 2Kp30), and 12G-SDI (11.88 Gbps, 2Kp60).

MIPI-CSI-2, commonly used in industrial cameras, is a sensor interface that connects image sensors to FPGAs. The PolarFire family supports up to 1.5 Gbps of receive speed and 1 Gbps of transmit speed per lane.

SLVS-EC Rx, which guarantees a speed of 2.3 Gbps per lane, supports high-resolution cameras as an image sensor interface IP, and 2-lane or 8-lane SLVS-EC Rx FPGA core implementation is also possible.

The PolarFire family supports speeds of 1, 2.5, 5 and 10 Gbps over an Ethernet PHY, enabling initiatives to meet the needs of Universal Serial 10 GE Media Independent Interface (USXGMII) MAC IPs with auto-negotiation.

CoaXPress is a standard used in high-performance machine vision, medical and industrial inspection. In line with industry standards roadmaps, Microchip will support CoaXPress v2.0, which increases bandwidth to 12.5 Gbps.

HDMI IP cores currently support resolutions up to 4K at 60fps transmission and 1080p at 60fps reception.

The PolarFire FPGA Imaging IP bundle features MIPI-CSI-2 and includes image processing IP for edge detection, alpha blending, and image enhancement for color, brightness, and contrast adjustments.

The Smart Embedded Vision Initiative brings Kaya Instruments, which provides the PolarFire FPGA IP core for CoaXPress v2.0 and 10 GigE vision, to Microchip’s partner ecosystem.

The ecosystem includes Alma Technology, Bitec, and AI partner ASIC Design Services.

ASIC Design Services provides a Core Deep Learning (CDL) framework that supports power-efficient Convolutional Neural Network (CNN)-based imaging and video platforms for embedded and edge computing applications.

The PolarFire FPGA family delivers 30-50% lower total power than competing SRAM (Static Random-Access Memory)-based mid-range FPGAs. PolarFire FPGAs deliver 5-10x lower static power using a family of products ranging from 100K to 500K logic elements (LEs), making them ideal for compute-intensive edge devices, including those deployed in thermally and power-constrained environments.

In addition to the new high-speed imaging IP core and PolarFire imaging IP bundle, a new MIPI-CSI2-based machine learning camera reference design is available for implementing smart embedded systems.

A reference design based on the PolarFire FPGA Imaging and Video Kit using inference algorithms from Microchip’s partner ASIC ASIC Design Services is available free of charge for customer evaluation.

All smart embedded vision solutions are supported by Microchip’s comprehensive development tool, the Libero SoC Design Suite.

All IPs can be implemented on the PolarFire FPGA Video and Imaging Kit, an evaluation platform for smart embedded vision designs. The following IP cores are currently available for purchase:

▲HD-SDI (1.485 Gbps, 720p, 1080i) ▲3G-SDI (2.970 Gbps, 1080p60) ▲MIPI-CSI-2 ▲2-lane SLVS-EC Rx FPGA core ▲6.25 Gbps CoaXPress v1.1 ▲HDMI 2.0 supporting 4k at 60 fps transmission and 1080p at 60 fps reception

Additionally, additional IP cores will continue to be added, and all cores will be supported by the end of 2019.

▲6G-SDI(5.94 Gbps, 2Kp30) ▲12G-SDI(11.88 Gbps, 2Kp60) ▲USXGMII MAC ▲8-lane SLVS-EC Rx ▲6.25 Gbps CoaXPress v2.0 ▲HDMI 2.0b supporting 4K resolution at 60fps reception

The PolarFire Imaging IP Bundle is available for $1,499, and the MPF300-VIDEO-KIT is available for $999.

“Working with our ecosystem of partners to deliver IP and hardware offerings is essential to enabling our customers to innovate while meeting their production schedules,” said Shakeel Peera, vice president of product marketing for the FPGA business unit of Microchip’s Microsemi subsidiary. “This is especially important given the rapid evolution of machine and computer vision with the growing adoption of AI and the need to democratize edge-based vision systems.”