Xilinx Launches SmartNIC Turnkey Platform for Data Centers
Published2020.03.04 14:42OCP 3.0 form factor based Ethernet adapter and
FPGA-based OCP Accelerator Module Concept Verification Revealed
Cloud service providers are increasingly deploying SmartNICs to reduce the load on CPU cores critical for running business applications and to optimize server utilization as capacity expands.
Accordingly, the SmartNIC market is expected to exceed $600 million by 2024 and account for 23% of the global Ethernet adapter market.
On the 4th, Xilinx announced a SmartNIC platform that combines network, storage, and computing acceleration capabilities on a single device.
The 'Alveo U25 SmartNIC' is designed to provide SmartNIC efficiency to cloud service providers, telecommunications carriers, and private cloud data center operators who are struggling with increasing networking demands and cost burdens.
The U25 integrates a SmartNIC platform and an FPGA-based engine to support programmable functions and turnkey application acceleration.
By providing a comprehensive SmartNIC platform, we support SDN, virtual switching, and NFVIt can address demanding requirements and workloads such as NVMe-ofF, e-commerce, AI inference, video transcoding, and data analysis.
Samples of the U25 are currently available, and general supply is scheduled for the third quarter of 2020.
In addition, Xilinx unveiled the first XtremeScale X2562 10/25Gb Ethernet adapter card based on the Open Compute Project (OCP) specification 3.0 form factor and announced a proof of concept for the world's first FPGA-based OCP Accelerator Module (OAM).
Supply of the X2562 is scheduled to take place in the second quarter of 2020.
관련뉴스
.png)
Microchip Begins Early Access to RISC-V Based SoC FPGA
Microchip announced the launch of an early access program for the PolarFire SoC FPGA. By enrolling in this program, developers can begin development using Microchip's Libero SoC 12.3 FPGA design suite and SoftConsole 6.2 IDE for embedded developers. Developers can also debug their embedded applications using Renode, a virtual model of the microprocessor subsystem.
2019.12.11by 이수민 기자
MATLAB and Simulink Support Universal Verification Methodology 'UVM' to Accelerate FPGA and ASIC Verification
HDL Verifier enables design verification engineers developing FPGA and ASIC designs to directly generate Universal Verification Methodology (UVM) components and testbenches through Simulink, and supports their use in simulators that support UVM, such as Synopsys, Cadence, and Mentor Graphics.
2020.01.15by 이수민 기자
MathWorks Supports Automation of FPGA/ASIC-Based Vision System Design with Vision HDL Toolbox R2019
매스웍스는 매트랩과 시뮬링크의 릴리스 2019b에 포함된 비전 HDL 툴박스를 통해 FPGA 상에서의 HFR 및 고해상도 영상 처리를 위한 네이티브 다중 픽셀 스트리밍을 지원한다고 발표했다. 비전 HDL 툴박스는 영상, 이미지 처리 및 FPGA 설계 엔지니어가 4K나 8K 영상, 초당 240프레임 이상의 고해상도 영상 처리 시 시스템 동작 및 구현 간의 트레이드 오프를 탐색하거나 시뮬레이션하는 작업을 가속한다.
2020.02.27by 이수민 기자
ST Microelectronics and NUS Establish Joint Research Center 'HELIX' for Edge AI
ST Microelectronics and the National University of Singapore have established the 'HELIX' joint research center aimed at implementing embedded AI in edge environments. Over a four-year period, the center will conduct research across the entire technology stack from algorithms to silicon, focusing on memory-centric architecture leveraging ST's 18nm FD-SOI technology and embedded PCM. The core objective is to implement intelligence directly in physical devices such as robots and drones while minimizing energy consumption.
2026.08.28by 배종인 기자
ams, 디지털 포토닉스로 휴머노이드 로봇 감각·소통 기능 지원
ams OSRAM이 디지털 포토닉스 기술을 활용해 휴머노이드 로봇의 감각·소통 기능을 강화하는 솔루션을 공개했다. dToF 센서, 광학식 힘 센서, 구조광 이미터 등으로 주변 환경 인식과 정밀 조작을 구현하며, EVIYOS·ALIYOS 플랫폼으로 LED 기반 비언어 소통을 지원한다. 시장조사에 따르면 휴머노이드 로봇 시장은 2025년 6억 달러에서 2035년 510억 달러로 성장할 전망이며, 로봇의 감각 능력 향상이 핵심 성장 동인으로 작용할 것으로 예상된다.
2026.08.27by 배종인 기자
