META-DX2L, 112G PAM4 interface speed
Convert routers, switches, and line cards to double their bandwidth


Routers, switches, and line cards require high bandwidth, port density, and up to 800 Gigabit Ethernet (GbE) connectivity to handle increasing data center traffic driven by 5G, cloud services, AI, and machine learning applications.

To deliver these high bandwidths, designers must overcome the signal integrity challenges inherent in transitioning to the 112G (gigabit per second) PAM4 SerDes connectivity required to support the latest pluggable optics, system backplanes, and packet processors.

Microchip announced on the 9th the launch of its PM6200 'META-DX2L', a 1.6T (terabit per second) low-power PHY solution. Compared to the previous generation product, the 56G PAM5 'META-DX1', the industry's first terabit-class PHY solution, power consumption per port is reduced by 35%.

The new Ethernet PHY is an industrial temperature-grade device supporting 1.6T bandwidth, a space-saving footprint, 112G PAM4 SerDes technology, and Ethernet speeds from 1 GbE to 800 GbE. Maximizes design reuse in applications such as retimers, gearboxes, reverse gearboxes, and hitless 2:1 multiplexers (MUX) with diverse connectivity.

The versatile crosspoint and gearbox capabilities leverage the switch device's I/O bandwidth to provide the connectivity flexibility needed for multi-rate cards supporting a wide range of pluggable optics. PAM4 SerDes support next-generation infrastructure interface speeds for cloud data centers, AI/ML computing clusters, and 5G services, utilizing long-haul Direct Attach Copper (DAC) cables, backplanes, or pluggable optics.

The META-DX2L Ethernet PHY comes in the industry's smallest package size of 23 × 30 mm, saving space required to implement line card port density.

Microchip offers design resources, reference designs, and evaluation boards. In addition to Ethernet PHY technology, Microchip offers system suppliers a total system solution, including the PolarFire® FPGA, the ZL30632 high-performance PLL, oscillators, voltage regulators, and other pre-validated components in a system equipped with the META-DX2L.

The META-DX2L device is scheduled to begin sampling in the fourth quarter.