Data volumes are growing exponentially. This is due to the massive increase in data to be processed due to advancements in technologies like AI, autonomous driving, the metaverse, and the cloud. In the age of AI and big data, humanity is generating a massive amount of data, surpassing the amount of data accumulated in previous eras in just one or two days.

Accordingly, advancements in semiconductor technology, which must process and transmit infinitely increasing data, are essential, and changes at the SoC level for improved interconnectivity and innovation in computing architecture are attracting attention.

At the Korea Semiconductor Industry Association's Semiconductor Digital Forum, which was held on the 20th, a lecture was given on future semiconductor technology trends with the topic of the future of the semiconductor industry.

Kim Young-woo, head of SK Securities' Research Center, who led a session as a speaker at the forum that day, stated, "With the widespread adoption of the metaverse and cloud environments, data movement and transmission volumes will increase, making broadband, low-power, and ultra-high-speed transmission key." He explained the semiconductor trend of maximizing data transmission speeds while simultaneously combining memory and processors.

"The core of system degradation stems from the bottlenecks inherent in the von Neumann architecture," said Director Kim, noting that advanced interconnects require changes at the SoC level and innovations in computing architecture. He explained that the ultimate goal of SoCs to eliminate these bottlenecks is neuromorphic semiconductors, with PNM and PIM being utilized as transitional steps. “Data transmission consumes more energy resources than computation, so reducing this is important from an ESG perspective as well,” he added.





Director Kim said, “When looking at the patent of Synopsys Inc., which is in charge of the design, the basic structural analysis for implementing AI chips is to place HBM on both sides and attach the processor core and memory,” and emphasized, “If HBM is applied to ultra-high-speed, high-capacity DRAM, the post-processing will inevitably become important.” It is expected that the importance of post-processing will increase as development and supply through collaboration between processor and memory manufacturers will become necessary from the product planning stage.

Also, in regards to the increasing importance of SerDes (Serializer-Deserializer), Director Kim stated, “When data processed in parallel is transmitted serially and data received serially is converted into parallel data and distributed, the importance of SerDes-related chips and interfaces will increase,” and “Ultra-high-speed transmission with wideband, low latency, and low power is expected to be key.”

In computing architecture for interconnect enhancement, there are multiple consortia competing in duplicate, such as OpenCAPI, CCIX, GenZ, and CXL, but Center Director Kim asserted that CXL will become mainstream.

OpenCAPI is adopted only by IBM, CCIX is adopted only by AMD, and CXL was evaluated to have improved its shortcomings by introducing a switch in CXL2.0 while integrating Gen-Z last November, so it is predicted that the next-generation memory will be based on CXL.

Center Director Kim predicted that memory companies would initially enter the CXL market with DRAM memory expanders. Samsung Electronics' CXL DRAM, mentioned as an example, is expected to lead the growth of the ultra-high-speed data service market by developing the industry's first CXL-based DRAM memory technology in May of last year. CXL memory is being called the next-generation DRAM because it offers a solution that can overcome the limitations of existing computing performance, amidst a trend of AI data processing volumes increasing tenfold each year. CXL DRAM is attracting attention for its interface advantages, which can expand memory capacity limits and server flexibility.

Director Kim stated, “In the future, data will be transmitted and moved a lot, so the era of smart NICs (Network Interface Cards) with HBM built into the network interface cards will arrive,” adding, “Development of persistent memory to replace Optane SSDs also remains a future task.”

He also predicted that “the importance of strategic product development through inter-industry collaboration will increase as processors and memory are combined.”