AMD is leading the way in cutting-edge technology innovation by being the first to produce products using TSMC's 2nm process.

AMD announced that its next-generation AMD EPYC™ processor, codenamed “Venice,” will be the industry’s first high-performance computing (HPC) product semiconductor to be tape-out and manufactured on TSMC’s advanced N2 process technology.

AMD also announced that it has successfully completed silicon implementation and validation of its 5th generation AMD EPYC CPU products at TSMC’s new manufacturing facility in Arizona.

Venice, scheduled for launch next year, is a significant product in AMD’s data center CPU roadmap, and its achievement demonstrates the strength of AMD and TSMC’s semiconductor manufacturing partnership to jointly optimize new design architectures and cutting-edge process technologies.

“TSMC has been a long-standing, key partner for AMD, and through collaboration with TSMC’s R&D and manufacturing teams, AMD has consistently delivered leading products that push the boundaries of high-performance computing,” said AMD CEO Lisa Su.

“AMD’s leadership in cutting-edge technology innovation is further evidenced by its status as a major HPC customer for TSMC’s N2 process and Arizona Fab 21,” “This demonstrates our strong partnership with TSMC in realizing future computing,” he explained.

CC Wei, CEO of TSMC, said, “We are very proud to have AMD as a major customer for TSMC’s advanced N2 process and HPC in our Arizona fab. Our collaboration is driving improvements in performance, power efficiency, and yield for high-performance semiconductors, and we look forward to continuing to innovate with AMD for the next generation of computing.”