'Veloce App', through a series of hardware and software integration verifications
Perform low-power verification, power estimation, and performance characteristic analysis.

SoC and system designs are becoming increasingly complex. With multiple processors, protocol interfaces, and extensive software, what solution is appropriate for verifying all this complexity?

On February 22nd, a Mentor Graphics press conference was held at the Ritz-Carlton Hotel in Yeoksam-dong, Seoul. The presentation was led by Gabriele Pulini (pictured), Product Marketing Manager for the Emulation Department at Mantor Graphics.

“The emulation market is growing bigger than the simulation market,” he explained. “The ‘Veloce App’ released by Mantographics can solve important verification problems in system design.”

Users of emulation solutions have traditionally relied on in-circuit emulation (ICE) environments for comprehensive verification, leaving them vulnerable to ICE model debugging issues. Mentor Graphics' Veloce Deterministic ICE solution enables users to capture and analyze waveforms and root cause information at any point during verification through unique waveform streaming technology within the ICE environment.

The Veloce app consists of Mantographics' emulation solutions, including 'Veloce Deterministic ICE', 'Veloce DFT', and 'Veloce FastPath'.

Veloce Deterministic ICE overcomes the unpredictability of in-circuit emulation (ICE) environments by adding visibility and repeatability for debugging, and provides access to other "virtual-based" use models. Veloce DFT accelerates Design for Test (DFT) verification time to minimize the risk of catastrophic failures before tapeout, and significantly reduces runtime during design verification after DFT insertion. Veloce FastPath optimizes emulation performance by enabling faster model execution when verifying large, multi-clock SoC designs.

Improved verification processing speed performance compared to hardware-centric strategies

This allows software to address design risks much more quickly than hardware-centric strategies when running on hardware with adequate performance and a scalable operating system.

Additionally, the Veloce OS operating system allows for easy integration of usage models that increase the return on investment for the emulator. Its plug-and-play operation accommodates flat and hierarchical designs, and its reduced memory requirements for compilation through flow improves performance.

"These latest innovations are increasing our customers' overall verification throughput performance," said Eric Selosse, Vice President and General Manager of Mentor's Emulation Business Unit. "Focusing on software applications for specific SoC and system-level problems will drive the future of emulation."

(Mentor Graphics press conference, courtesy of Mentor Graphics)