Continued cooperation with KISTI to strengthen the domestic HPC infrastructure

Intel Korea (President Myung-Sook Kwon) introduced the next-generation Intel® Xeon Phi™ processor (codename: Knights Landing) and announced strategies to target the machine learning and HPC markets through a customer seminar and press conference held at the El Tower in Yangjae-dong.

Intel Xeon Phi processors are flexible bootable host processors capable of handling multiple analytics workloads. The Intel Xeon Phi family provides up to 1.38 times better scalability than GPUs on a 32-node infrastructure, and using the Intel Xeon Phi family on a 128-node infrastructure allows models to be trained up to 50 times faster than a single node.

The Intel Xeon Phi family can also deliver enhanced performance when combined with the Intel Xeon E5 processor family, which is the most widely adopted infrastructure for machine learning.

The strategy is to fully target the domestic market by providing customers with systems optimized for HPC and machine learning—along with Intel Xeon Phi processors—which are optimized for machine learning scoring models, and by strengthening the related product roadmap.

Expansion of the software base for HPC and machine learning

We also plan to strengthen cooperation with the open code developer community to expand the reach of machine learning. We plan to optimize deep learning frameworks such as Caffe, Tensorflow, and Theano to support optimal performance of related software on Intel architecture, while also optimizing and releasing open Math Kernel Libraries (MKL) for Deep Neural Networks (DNN).

Intel and the Korea Institute of Science and Technology Information (KISTI) signed a Memorandum of Understanding (MOU) last June and agreed to cooperate closely in the areas of motherboard design, software, clustering, and fabric to develop domestic supercomputer systems based on Intel Xeon Phi and Intel OPA.

KISTI was the first in the Asia-Pacific region to be selected for the 'Intel Center for Parallel Computing (IPCC)' for two consecutive years. The IPCC is a program that Intel has been running since 2013 to expand the foundation of HPC, selecting high-level research institutions worldwide that utilize HPC technology and providing research funding for up to two years.

In this regard, Dr. Ryu Hoon of KISTI personally attended today's event and introduced the progress of the IPCC project. Dr. Ryu explained that by utilizing the Xeon Phi processor, improved results were achieved in key numerical computation areas for the design of next-generation sub-nanometer-scale semiconductor devices.

Intel is also expanding expert training in HPC and machine learning. Since 2015, Intel has been running the Code Modernization Enablement Program (CMEP) in partnership with its partner, Daehan Consulting (http://www.manycoreinside.com/). This program provides training courses that enable the parallelization and vectorization of applications tailored to multiple cores, thereby optimizing the utilization of HPC systems based on Intel Xeon Phi and Xeon processors. So far, a total of 600 people have participated in the program, and we plan to complete training for an additional 400 professionals by the second half of this year.