Provides industry-leading integration and 3 times higher real-time performance compared to previous generation products

Infineon Technologies (Korea CEO Seung-soo Lee) announced the next-generation AURIX™ microcontroller family to support the requirements of autonomous and electric vehicles. The next-generation TC3xx microcontrollers provide industry-leading integration and three times higher real-time performance compared to the previous generation.

The AURIX TC3xx family combines a high-performance hexa-core architecture with advanced features for connectivity, security, and embedded safety, making it ideal for various areas of automotive applications. Powertrain applications include new systems for electric and hybrid drives, in addition to engine management and transmission control.

In particular, the new architecture offers many advantages for hybrid domain control, inverter control, battery management, and DC-DC converters. The AURIX TC3xx microcontroller is also suitable for safety-critical applications, ranging from airbags, brakes, and power steering to sensor-based systems utilizing radar or camera technology. By combining such high performance and a robust safety architecture, the TC3xx family is suitable for domain control and data fusion applications that support the next step toward full autonomous driving.

Peter Schaefer, Executive Vice President and General Manager of Microcontrollers at Infineon, said, “The AURIX TC3xx family will accelerate the development of autonomous and electric vehicles. We are proud to launch next-generation TriCore-based microcontrollers with outstanding performance that meet ISO 26262 ASIL-D system requirements with an optimal combination of performance, security, and safety, setting new performance standards.”

Connectivity and Security, Implementation of a New Level of ISO 26262 Functional Safety Computation Capability

The AURIX TC3xx family is highly scalable and incorporates up to 16 MByte of flash memory and more than 6 MByte of RAM. While the previous generation AURIX TC2xx microcontrollers had up to three TriCore™ cores, the new TC3xx multicore architecture provides up to six TriCore cores, each operating at a full clock frequency of 300 MHz. Four of the six cores feature additional lockstep cores, enabling a new level of ISO 26262 functional safety computing capability in a single integrated device. It supports ASIL-D class applications with up to 2400 DMIPS performance compared to the maximum of 740 DMIPS of the previous AURIX architecture.

The new product family enables automotive system suppliers to reduce development costs by 20% and shorten time-to-market by improving performance while maintaining existing safety concepts. In addition, more functions, such as powertrain, chassis domain control, next-generation radar, and fusion algorithms, can now be implemented on a single microcontroller.

In particular, automotive radar systems can benefit greatly from the capabilities of the AURIX TC3xx product family, ranging from blind spot monitoring to advanced forward radar. The TC3xx microcontrollers integrate a radar processing subsystem along with up to two dedicated signal processing units operating at 300 MHz, enabling the computation of next-generation radar algorithms on a single chip. Radar chips can be seamlessly connected to AURIX via high-speed digital radar interfaces.

The security features of the AURIX TC3xx have also been enhanced. A new version of the Programmable Hardware Security Module (HSM) supports secure on-board communication and prevents hardware manipulation, such as motor tuning. A new asymmetric encryption accelerator integrated into the HSM hardware helps achieve full EVITA support. Additionally, the AURIX TC3xx provides rapid over-the-air (OTA) software updates to protect against software hijacking.

As a host controller in gateway and telematics applications, the AURIX TC3xx microcontroller supports modern communication interfaces. It provides a Gigabit Ethernet interface, up to 12 ISO11898-1 compliant CAN-FD channels, and up to 24 LIN channels. In addition, an eMMC interface for external flash interfacing is provided, enabling the implementation of local data storage that supports the concept of software OTA updates.