Xilinx announced an innovative product category called ACAP (Adaptive Compute Acceleration Platform), which can overcome the limitations of FPGA capabilities.

ACAP is a highly integrated multicore heterogeneous computing platform that can be modified at the hardware level to adapt to the requirements of various applications and workloads. The adaptability of ACAP, which is performed dynamically during operation, provides levels of performance and performance per watt that CPU or GPU cannot match.

ACAP is well-suited to accelerate various applications in the era of big data and artificial intelligence. This includes video transcoding, databases, data compression, search, AI inference, genomics, machine vision, computational storage, and network acceleration. Through this, software and hardware developers can design ACAP-based products for endpoint, edge, and cloud applications. The first ACAP product family, codenamed "Everest," is being developed using TSMC's 7-nanometer process technology and is scheduled to complete development by the end of this year.

Victor Peng, President and CEO of Xilinx, stated, "ACAP is the most innovative technology that will overturn industry and engineering achievements since the invention of the FPGA. The new architecture is an innovative new structure that is part of the company's broad strategy, transcending FPGA limitations and the limitation of supporting only hardware developers. As ACAP products are adopted across a wide range of markets including data centers, the proliferation of adaptive computing will accelerate, and a smarter, more connected, and adaptive computing world will become a reality more quickly."

ACAP features distributed memory and hardware-programmable DSP blocks, multicore SoC, one or more programmable software, adaptive hardware, computing engines, and next-generation FPGA fabric with full connectivity through Network on Chip (NoC). Additionally, ACAP integrates hardware-programmable memory controllers, enhanced SerDes technology and advanced RF-ADC/DAC, and features highly integrated programmable I/O capabilities with High Bandwidth Memory (HBM) integration depending on the device type.

Software developers can develop target systems based on ACAP using tools such as C/C++, OpenCL, and Python, and can also program at the RTL level using FPGA tools.

Patrick Moorhead, founder of Moor Insights & Strategy, stated, "This is what the future of computing looks like. This refers to the ability to process genomic sequencing in minutes compared to what used to take days. It is also about data centers that have the ability to program servers to change workloads according to computing demands, such as doing video transcoding during the day and recognizing images at night. This is very important."

Everest has been in development for 4 years through sustained R&D investments exceeding one billion dollars. Currently, more than 1,500 hardware and software engineers are participating in Xilinx's "ACAP and Everest" design, and software tools have been delivered to key customers. "Everest" is scheduled to complete development in 2018 and is expected to ship to customers in 2019.