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Microchip Launches New Dual- and Single-Core dsPIC DSCs for High-End Embedded Control Application Design
| In automotive and wireless charging applications
Regarding memory capacity expansion and functional safety
New devices responding to market demand
System developers designing high-end embedded control applications require flexible options to provide scalability as project complexity increases. To address these needs, Microchip Technology announced on the 14th that it has released new dual-core and single-core dsPIC33C digital signal controllers (DSCs) with additional options to meet changing application requirements in terms of memory, temperature, and functional safety. 
Microchip dsPIC33C
Microchip's new dsPIC33CH512MP508 dual-core DSC supports applications with larger program memory requirements, while the dsPIC33CK64MP105 single-core DSC provides a cost-optimized version for applications with small memory and footprint requirements. Developers can easily expand their product lines by utilizing these new pin-to-pin compatible devices within the dsPIC33CH and dsPIC33CK product families. 
Microchip dsPIC33CH512MP508
The dsPIC33CH512MP508 (MP5) family is an extension of the recently released dsPIC33CH, with flash memory support increasing from 128KB to 512KB and program RAM tripling from 24KB to 72KB. This enables support for applications with multiple software stacks or large program memory requirements, such as automotive and wireless charging applications. Automotive applications require more memory to accommodate AUTOSAR software, MCAL drivers, and CAN FD peripherals. 
Microchip dsPIC33CH512MP508 Block Diagram (Open in a new window or tab to enlarge)
Implementing wireless charging in automotive applications requires an additional software stack for the Qi protocol and NFC, which significantly increases the required program memory capacity. While the Live Update feature, which updates firmware in real time, is an essential requirement for High Availability (HA) systems, it doubles the total memory capacity required.
Dual-core devices are designed so that one of the two cores functions as a master and the other as a slave. The master core handles the user interface, system monitoring, and communication, while the slave core is useful for executing dedicated time-critical control code. For example, using two cores allows the software stack to be partitioned to run other functions, such as the Qi protocol and NFC, in parallel to optimize performance in automotive wireless charging applications. 
Microchip dsPIC33CK64MP105
The dsPIC33CK64MP105 (MP1) expands the recently released dsPIC33CK family by adding a cost-optimized version for applications with relatively small memory and footprint requirements, offering up to 64 KB of flash memory in 28- to 48-pin packages. Package sizes start at a minimum of 4 mm x 4 mm. This compact device offers an ideal combination of features for automotive sensors, motor control, high-density DC-DC applications, or standalone Qi transmitters. Single-core and dual-core dsPIC33C devices are designed to provide fast and deterministic performance in time-critical control applications, provide context-selectable registers to reduce interrupt latency, and execute instructions for computationally intensive algorithms faster. 
Microchip dsPIC33CK64MP105 Block Diagram (Open in a new window or tab to enlarge)
All devices in the dsPIC33C family include functional safety hardware equipped with all the necessary features to facilitate the acquisition of Automotive Safety Integrity Level (ASIL) B and C certifications for safety-sensitive applications. Functional safety features include multiple redundant clock sources, Fail Safe Clock Monitor (FSCM), I/O port readback, Flash Error Correction Code (ECC), Built-In Self-Test (RAM BIST), write protection, analog peripheral redundancy, and many others. The robust set of CAN-FD peripherals now includes support for operation at 150°C, enabling ideal performance in extreme environments such as automotive engine bay applications.
The dsPIC33C family is supported by Microchip’s free MPLAB X integrated development environment (IDE), MPLAB code configurator, MPLAB XC16 C compiler toolchain, and MPLAB in-circuit debugger/programmer tool. Microchip’s MotorBench development suite version 2.0, which currently supports high-voltage motors up to 600V, enables customers to tune motors using field-oriented control (FOC) algorithms.
Various development boards and plug-in modules (PIMs) are available for the entire device family. Newly released development tools for devices include the dsPIC33CH Curiosity board (DM330028-2), the dsPIC33CH512MP508 general-purpose design PIM (MA330046), the dsPIC33CH512MP508 motor control PIM (MA330045), the dsPIC33CK64MP105 general-purpose design PIM (MA330047), the dsPIC33CK64MP105 external operational amplifier (op amp) motor control PIM (MA330050-1), and the dsPIC33CK64MP105 internal operational amplifier motor control PIM (MA330050-2).
The dsPIC33CH512MP5 device is currently available in 48/64/80-pin TQFP, 64-pin QFN, and 48-pin uQFN packages. The dsPIC33CK64MP1 device is available in 28-pin SSOP, 28/36/48-pin uQFN, and 48-pin TQFP packages. The unit price for the dsPIC33C device starts at $1.34 for bulk purchases.
Joe Thomsen, Vice President of Microchip Technology’s MCU16 business unit, stated, “With a family of 76 dsPIC33C single-core and dual-core devices and common tools, common peripherals, and footprint compatibility, it can be easily scaled to accommodate changes in memory, I/O, performance, and budget,” adding, “These dual-core products simplify software integration, allowing each software development team to focus on control algorithms instead of communication and housekeeping code.”
Regarding memory capacity expansion and functional safety
New devices responding to market demand
System developers designing high-end embedded control applications require flexible options to provide scalability as project complexity increases. To address these needs, Microchip Technology announced on the 14th that it has released new dual-core and single-core dsPIC33C digital signal controllers (DSCs) with additional options to meet changing application requirements in terms of memory, temperature, and functional safety.

Microchip dsPIC33C
Microchip's new dsPIC33CH512MP508 dual-core DSC supports applications with larger program memory requirements, while the dsPIC33CK64MP105 single-core DSC provides a cost-optimized version for applications with small memory and footprint requirements. Developers can easily expand their product lines by utilizing these new pin-to-pin compatible devices within the dsPIC33CH and dsPIC33CK product families.

Microchip dsPIC33CH512MP508
The dsPIC33CH512MP508 (MP5) family is an extension of the recently released dsPIC33CH, with flash memory support increasing from 128KB to 512KB and program RAM tripling from 24KB to 72KB. This enables support for applications with multiple software stacks or large program memory requirements, such as automotive and wireless charging applications. Automotive applications require more memory to accommodate AUTOSAR software, MCAL drivers, and CAN FD peripherals.

Microchip dsPIC33CH512MP508 Block Diagram (Open in a new window or tab to enlarge)
Implementing wireless charging in automotive applications requires an additional software stack for the Qi protocol and NFC, which significantly increases the required program memory capacity. While the Live Update feature, which updates firmware in real time, is an essential requirement for High Availability (HA) systems, it doubles the total memory capacity required.
Dual-core devices are designed so that one of the two cores functions as a master and the other as a slave. The master core handles the user interface, system monitoring, and communication, while the slave core is useful for executing dedicated time-critical control code. For example, using two cores allows the software stack to be partitioned to run other functions, such as the Qi protocol and NFC, in parallel to optimize performance in automotive wireless charging applications.

Microchip dsPIC33CK64MP105
The dsPIC33CK64MP105 (MP1) expands the recently released dsPIC33CK family by adding a cost-optimized version for applications with relatively small memory and footprint requirements, offering up to 64 KB of flash memory in 28- to 48-pin packages. Package sizes start at a minimum of 4 mm x 4 mm. This compact device offers an ideal combination of features for automotive sensors, motor control, high-density DC-DC applications, or standalone Qi transmitters. Single-core and dual-core dsPIC33C devices are designed to provide fast and deterministic performance in time-critical control applications, provide context-selectable registers to reduce interrupt latency, and execute instructions for computationally intensive algorithms faster.

Microchip dsPIC33CK64MP105 Block Diagram (Open in a new window or tab to enlarge)
All devices in the dsPIC33C family include functional safety hardware equipped with all the necessary features to facilitate the acquisition of Automotive Safety Integrity Level (ASIL) B and C certifications for safety-sensitive applications. Functional safety features include multiple redundant clock sources, Fail Safe Clock Monitor (FSCM), I/O port readback, Flash Error Correction Code (ECC), Built-In Self-Test (RAM BIST), write protection, analog peripheral redundancy, and many others. The robust set of CAN-FD peripherals now includes support for operation at 150°C, enabling ideal performance in extreme environments such as automotive engine bay applications.
The dsPIC33C family is supported by Microchip’s free MPLAB X integrated development environment (IDE), MPLAB code configurator, MPLAB XC16 C compiler toolchain, and MPLAB in-circuit debugger/programmer tool. Microchip’s MotorBench development suite version 2.0, which currently supports high-voltage motors up to 600V, enables customers to tune motors using field-oriented control (FOC) algorithms.
Various development boards and plug-in modules (PIMs) are available for the entire device family. Newly released development tools for devices include the dsPIC33CH Curiosity board (DM330028-2), the dsPIC33CH512MP508 general-purpose design PIM (MA330046), the dsPIC33CH512MP508 motor control PIM (MA330045), the dsPIC33CK64MP105 general-purpose design PIM (MA330047), the dsPIC33CK64MP105 external operational amplifier (op amp) motor control PIM (MA330050-1), and the dsPIC33CK64MP105 internal operational amplifier motor control PIM (MA330050-2).
The dsPIC33CH512MP5 device is currently available in 48/64/80-pin TQFP, 64-pin QFN, and 48-pin uQFN packages. The dsPIC33CK64MP1 device is available in 28-pin SSOP, 28/36/48-pin uQFN, and 48-pin TQFP packages. The unit price for the dsPIC33C device starts at $1.34 for bulk purchases.
Joe Thomsen, Vice President of Microchip Technology’s MCU16 business unit, stated, “With a family of 76 dsPIC33C single-core and dual-core devices and common tools, common peripherals, and footprint compatibility, it can be easily scaled to accommodate changes in memory, I/O, performance, and budget,” adding, “These dual-core products simplify software integration, allowing each software development team to focus on control algorithms instead of communication and housekeeping code.”
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