Samsung Electronics to Support Korea's System Semiconductor Ecosystem Since 2019
Providing SAFE-CDP, a design platform, to small and medium-sized fabless companies.


Samsung Electronics announced on the 18th that it will provide a platform for designing semiconductor chips in the cloud to domestic small and medium-sized fabless companies to strengthen the competitiveness of the domestic system semiconductor ecosystem.

Last April, Samsung Electronics announced plans to strengthen its system semiconductor ecosystem. Since then, it has expanded its Multi-Project Wafer (MPW) program for domestic small and medium-sized fabless companies to operate three to four times per process annually. It also offers opportunities to utilize 8-inch (200mm) and 12-inch (300mm) wafer processes.

Since the second half of 2019, Samsung Electronics has been providing technical training, including layout, design methodology, and verification, to domestic fabless companies and design houses. A Samsung Electronics representative stated that products developed through collaborations with small and medium-sized companies following the announcement of its ecosystem strengthening plan are scheduled for mass production starting in late 2020.

◇ SAFE-CDP Supports Chip Design for Small and Medium-Sized Fabless Companies in the Cloud

Samsung Electronics has been operating the foundry ecosystem program 'SAFE (Samsung Advanced Foundry Ecosystem)' since 2018. Accordingly, we recently launched the ‘Integrated Cloud Design Platform (SAFE Cloud Design Platform; SAFE-CDP)’.

SAFE-CDP, jointly developed by Rescale and Samsung Electronics, is a service that provides a virtual design environment so that fabless customers can immediately begin chip design with just an idea.

This service is a platform built to enable the SW of automation design SW companies Ansys, Mentor (a Siemens Business), Cadence, and Synopsys to run on the public cloud.

As processes become more refined, semiconductor chip design becomes more complex and challenging. As the design process progresses, the computing resources required increase exponentially, and the time required for chip verification becomes significant.

SAFE-CDP reduces customers' investment burden for server expansion and allows them to flexibly use computing resources required for chip design and verification work according to stage.

A Samsung Electronics official stated that Gaonchips, a domestic fabless company, used SAFE-CDP to shorten the design time for automotive semiconductor chips by approximately 30% compared to previous models. The official added that several domestic companies, including AD Technology and Hanatech, have expressed interest in using SAFE-CDP.