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RF-to-bit development platform accelerating phased array system design

Google 우선 소스Published2020.09.03 12:15
ADI MxFE Multichannel RF-to-bit Development Platform,
Streamlining the multi-channel RF system product development process



Future antenna designs must implement phased arrays.

Changed technological trends and pressure for rapid time-to-market present RF designers of phased array systems with challenges such as verifying RF electronics in multi-channel environments, verifying inter-channel synchronization and calibration, and developing software in parallel with production hardware development.

To address these challenges, ADI has launched a multi-channel RF-to-bit development platform based on software-configurable high-speed converters. This platform includes a data converter, RF distribution, power control, a 16-channel clock supply, and a direct S-band sampling solution.


Integrated RF Sampling High-Speed Converter
The recently released high-speed converter integrates an ADC, DAC, and digital signal processing block into monolithic silicon.
▲ Description of AD9081 functions [Figure=ADI]

The MxFE™ 4-channel 16-bit 12 GSPS RF DAC and 4-channel 12-bit 4 GSPS RF ADC shown in the figure above are examples that include 4 ADCs, 4 DACs, and digital up/down converters, as well as NCOs (Numerically controlled oscillators) and FIRs (Finite-impulse response) digital filters.

The DAC is rated at a sampling rate of 12 GSPS, and the ADC is rated at 4 GSPS. Analog bandwidth provides direct sampling and waveform generation from the S-band to the low C-band.

This converter handles a wider range of RF spectrum bands and features on-chip DSP capabilities, allowing users to configure programmable filters and digital up/down conversion blocks to meet specific wireless signal bandwidth requirements.

Dedicated silicon has built-in embedded processing capabilities, which can significantly reduce power consumption compared to architectures that perform these functions on FPGAs.

Designers can secure useful FPGA resources that are freely available, allowing them to use more cost-effective FPGAs or allocate the FPGA's spare resources to higher-level system application processing.


16-channel, Direct RF Sampling Development Platform
The photo below shows a 16-channel, direct RF sampling development platform.
▲ Quad MxFE [Photo=ADI]
▲ Quad MxFE block diagram [Photo=ADI]

This integrated converter is called a Mixed-Signal Front-End (MxFE), and the 16-channel board has four It was named 'Quad MxFE' because it includes MxFE. Since each MxFE includes 4 DACs and ADCs, there are a total of 16 transmit channels and 16 receive channels in the Quad MxFE.

The RF section includes a balun, amplifier, and filter, thereby simplifying the RF interface.

The transceiver channel includes a low-pass filter for DAC image suppression and a gain block at the DAC output. The receiver channel includes two gain stages and gain control, along with a band-pass filter for second-order Nyquist sampling.

The filter fits into the 1206 filter footprint of Mini-Circuits, so users can replace it with a filter for other applications.

Channel spacing is implemented at 600 mils per T/R pair, supporting X-band, half-wavelength, and unipolar element grating spacing. Within this footprint, this product is compatible with all-element digital beamforming systems up to X-band frequencies. Since the Quad MxFE directly generates the S-band, X-band frequency operation can be achieved by adding a separate RF mixer.

A clocking circuit is included, and all clocks are taken from a common reference frequency. A PLL is provided per converter, is phase-synchronous to the reference frequency, and provides an AD9081 clock input. An option to insert test points is provided for evaluation using an alternative converter clock source.

The digital clock is also derived at a common reference frequency. A clock chip is included to provide SYSREF to the AD9081 for synchronization and the clock required for the FPGA, as well as a reference frequency that allows the AD9081 to optionally use an internal PLL.
▲ Power distribution of Quad MxFE [Figure=ADI]

Looking at the figure above, you can see that power distribution and regulation are included. All necessary voltages are taken from a single 12V input. The power distribution design includes a structure in which a low-noise linear regulator for sensitive analog voltages is coupled behind a switching regulator.


Software control
Software, firmware, and FPGA code were developed to enable the platform to be controlled by a higher-level processing language.

In addition, MATLAB scripts and a GUI were written to enable system engineers developing models to connect directly to the hardware within the MATLAB environment.

The MATLAB interface enables the direct evaluation of custom waveforms tested in simulations on hardware. By utilizing the received data capture interface, specific processing of received data is possible.

Both the software and firmware are open source, a characteristic similar to other ADI module products based on the latest transceivers or converters.


Quad MxFE eliminates the prototyping phase in RF system development
The Quad MxFE RF-to-bit development platform, which implements a general-purpose prototyping environment, provides designers with a development platform that demonstrates multi-channel synchronization across the entire converter IC and board, as well as multi-channel performance verification in an evaluation board environment before proceeding with production design for the purpose of simultaneously testing multi-channels.

In addition, it supports integration and functional levels that enable parallel hardware production and software development, as well as reference designs for all circuits surrounding the high-speed converter, including RF I/O, clocking and synchronization circuits, power distribution, and high-speed digital I/O routing.

Combining these methods can eliminate the prototyping phase in multichannel RF system product development, allowing RF engineers to focus more on system solutions.

The original purpose of the RF-to-bit development platform was to develop phase arrays. However, thanks to the versatility provided by the platform, it could be applied to all multi-channel RF systems such as radar, EW, 5G, and instrumentation applications.

As a result, designers can now encounter a single hardware, multi-application platform that provides a true software-defined multi-channel environment.



This article is a summary of the piece titled "Multichannel RF-to-Bits Development Platform Enables Rapid Prototyping for Phased Arrays," co-authored by Analog Devices engineers Peter Delos, Charles Frick, and Mike Jones.
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